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Description: jtag技术规范,以及标准的并口jtag下载电缆的资料-JTAG technical specifications, as well as the standard parallel port JTAG download cable data
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Size: 12288 |
Author: 张恒 |
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Description: 将msp430与使用nios的fpga相连,将fpga作为msp430的jtag使用。其中用到了nios内的多种接口以及dma操作-The MSP430 with the use of the Nios FPGA connected to the FPGA as the MSP430 JTAG to use. Which used the Nios multiple interfaces and dma operation
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Size: 56320 |
Author: danielmu |
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Description: CPLD程序,ALTERA公司的EPM7128SLC84-10,PLCC84封装,已经调试过的程序,包含仿真文件,波形文件,VHDL语言程序,电路图以及PCB板和系统原理图,非常有用,尤其是初学EDA和CPLD、FPGA器件的人-CPLD procedures, ALTERA Corporation EPM7128SLC84-10, PLCC84 package, has been testing the procedure, including the simulation files, wave files, VHDL language program, circuit boards and systems, as well as PCB schematics, very useful, especially the beginner EDA and the CPLD, FPGA devices were
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Size: 155648 |
Author: xiaobo |
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Description: FPGA、CPLD芯片的usb数据下载线,下载速度是并口的5位,内有原理图用程序-FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
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Size: 234496 |
Author: 李聚光 |
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Description: actel FPGA JTAG电路 周立功开发-actel JTAG
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Size: 32768 |
Author: pigeoon |
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Description: FPGA或者CPLD通过JTAG接口对FLASH进行读写的资料。非常有用-Programming Flash Memory from FPAGs and CPLDs Using the JTAG Port. Very useful
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Size: 305152 |
Author: superstar |
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Description: Xilinx FPGA block RAM reconfig via JTAG
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Size: 104448 |
Author: Kraja |
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Description: 详细介绍FPGA的JTAG原理和应用,主要设计Xilinx的FPGA的JTAG设计和下载方式-XilinxFPGAJTAG
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Size: 3965952 |
Author: lxb |
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Description: Fpga开发应用,jtag方面的源代码,VHDL-Fpga development and application, jtag in the source code, VHDL
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Size: 3072 |
Author: 王刚 |
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Description: 有关FPGA的AS、JTAG配置的中文资料-The FPGA-AS, JTAG configuration of the Chinese data
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Size: 143360 |
Author: 王俊浩 |
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Description: The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it can be ported to other hardware. The circuits were designed on a Windows XP using the Xilinx WebPack 6.2 tool. The transfer of the design to the FPGA was carried out either with the Xilinx Impact tool through a parallel JTAG cable or with the Digilent Export utility through a USB JTAG cable.
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Size: 1854464 |
Author: sami |
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Description: Xilinx FPGA的配置中,从Flash中读写用户数据,包括VHDL、Verilog程序-in configuring Xilinx FPGA,reading and writing user data from flash,including the VHDL and Verilog code
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Size: 158720 |
Author: 赵齐 |
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