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[Other resourcesdramusevhdl

Description: sdram的vhdl实现 本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
Platform: | Size: 84842 | Author: cxr | Hits:

[VHDL-FPGA-Verilogsdramusevhdl

Description: sdram的vhdl实现 本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
Platform: | Size: 84992 | Author: cxr | Hits:

[assembly languageC51CrossLight

Description: 1.设计一个交通灯控制器。 2.利用学习机上的发光二极管,设定东、南、西、北4个方向,各3个灯(红、黄、绿)。交通灯控制器正常工作时,南北方向红灯亮3秒,黄灯闪2秒,绿灯亮3秒,以此类推。东西方向绿灯亮3秒,黄灯闪2秒,红灯亮3秒,以此类推。 3.设定两个紧急按钮,一个控制南北灯,一个控制东西灯。当按下相应的紧急键时,其控制方向的交通灯亮绿灯,其他方向的交通灯亮红灯,至自控键松开,恢复正常交通控制。 -1. Design of a traffic light controller. 2. Use of learning machine on the LED and set the East, South, West, North 4 direction, the three lights (red, yellow, green). Traffic signal controller normal working hours, the north- and south-bound red light three seconds, two seconds flashing yellow light, green light-three seconds, and so on. East-west direction green three seconds, two seconds flashing yellow light, red light three seconds, and so on. 3. Set two emergency buttons, a north-south control lights, a light control things. When pressing the corresponding key emergency, its control the traffic lights green, the other direction, the traffic lights class. Key to loose control and restore normal traffic control.
Platform: | Size: 10240 | Author: wangpeng | Hits:

[VHDL-FPGA-Verilogps2_keyboard

Description: ps2 keyboard verilog源代码,支持ascii码.扫描码输出,扩展键输出,按下及释放信息输出-ps2 keyboard verilog source code, to support the ascii code. scan code output, the expansion of key output, press and release the information output
Platform: | Size: 5120 | Author: 李志刚 | Hits:

[Windows Developkey

Description: 密码锁控制器 设计一个密码锁,平时处于等待状态。管理员可以设置或更该密码。如果不预置密码, 密码缺省为“6666”。用户如果需要开锁,按相应的按键进入输入密码状态,输入4位 密码,按下确定键后,若密码正确,锁打开,若密码错误,将提示密码错误,要求重 新输入,三次输入都错误,将发出报警信号。报警后,只有管理员作相应的处理才能 停止报警。用户输入密码时,若输入错误,在按下确定键之前,可以通过按取消键重 新输入。正确开锁后,用户处理完毕后,按下确定键,系统回到等待状态。系统操作 过程中,只要密码锁没有打开,如果1 分钟没有对系统操作,系统回到等待状态。 -Password lock controller Designed a password lock, waiting in a normal status. Administrators can set up or the password. If you do not preset password, Default password is "6666." If you need to unlock the user, according to the corresponding status button to enter a password, type 4 Password, press OK, if the password is correct, open the lock, if the wrong password, wrong password will be prompted to request re- New inputs, the importation of all three errors, will issue a warning signal. Alarm, only the administrator can deal with accordingly Stop the alarm. Users to enter a password, if the input error, identified in the press before the key can be canceled by pressing the key re- New input. Unlock right, the user after the treatment, press OK, the system back to waiting status. System Operator As long as there is no open locks, 1 minutes, if not on the system operation, system status back to wait.
Platform: | Size: 1024 | Author: Jane | Hits:

[Software EngineeringdocProps

Description: This proyect is a controller of security key, in VHDL
Platform: | Size: 22243328 | Author: toties66 | Hits:

[VHDL-FPGA-Verilogkeyboardcontroller

Description: 键盘控制器VHDL代码 该控制器实时扫描矩阵键盘的行列,当用户有按键按下时,可以定位到对应的按键并产生一个中断信号-Keyboard controller entity -- -- The controller scans the columns, cols, by making a different column logic-0 -- therefor the inputs have to be pull-up high. It processes the input, rows, and -- the pressed key to a corresponding scancode and giving an interrupt --
Platform: | Size: 7168 | Author: 郑佛少 | Hits:

[VHDL-FPGA-VerilogKbtestbench

Description: VHDL编写的Keyboard control使用ps2 keboard来使fgpa的led上显示键盘的二进制代码,用4个7seg来显示0-9的数字,该程序包含testbench.-ps2 keyboard controller which could enable led on fgpa to show the binary code of each key on ps2 keyboard and another four 7segment will display the number from 0 to 9 when you press those number on keyboard, besides it will display E on 7seg when you press others.
Platform: | Size: 2048 | Author: hongwan | Hits:

[VHDL-FPGA-Verilogkeypadinterfacecontroller

Description: 设计并实现一个4X8键盘接口控制器,含有时序产生电路、键盘扫描电路、弹跳消除电路、键盘译码电路、按键码存储电路、显示电路。要求:当按下某一键时,在数码管上显示该键对应的键值-Design and implement a 4X8 keypad interface controller, with timing generator circuit, the keyboard scanning circuit, bounce elimination circuit, the keyboard decoder circuit, the key code memory circuit, display circuit. Requirements: When you press a key, the LED display key corresponding to the key
Platform: | Size: 6144 | Author: zhuimeng | Hits:

[VHDL-FPGA-VerilogPWM

Description: 基于FPGA的PWM控制器设计,包含ADC0820模块,按键扫描,PID,PWM控制器等模块,VHDL语言完成,已仿真通过-PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation
Platform: | Size: 787456 | Author: hbxgwjl | Hits:

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