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[Other resource] 32位-33M 从模式(target)PCI接口参考设计_lattice

Description: 32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32 / route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
Platform: | Size: 826676 | Author: 陈旭 | Hits:

[Embeded-SCM Develop] pcit32_lattice

Description: PCI接口的Verilog源代码-PCI connection Verilog source code
Platform: | Size: 397312 | Author: 包盛花 | Hits:

[VHDL-FPGA-Verilog] 32位-33M 从模式(target)PCI接口参考设计_lattice

Description: 32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
Platform: | Size: 826368 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] pcit32_verilog_lattice

Description: 这个我也太清楚是什么 反正师兄们说有用 发大家-I am also very clear that what is useful anyway, say senior U.S. fa
Platform: | Size: 430080 | Author: wang | Hits:

[Other] PCI_Lattice

Description: lattice公司的PCI接口范例程序，希望对设计PCI接口的人有所帮助-PCI interface sample program from lattice
Platform: | Size: 1548288 | Author: Sean Zhong | Hits:

[VHDL-FPGA-Verilog] rd1008_rev03.4

Description: PCI Target 33M,32-BIT LATTICE DEVICE-PCI Target
Platform: | Size: 735232 | Author: Eleven | Hits:

[Documents] 33M-(target)PCI-attice

Description: 32位33Mhz PCI接口程序设计参考，芯片是Lattice-This block is the top level Verilog module for the Vantis 32 bit 33Mhz PCI Target Reference Design.
Platform: | Size: 16384 | Author: chenguochun | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 32位33Mhz PCI接口程序设计参考，芯片是Lattice -32-bit 33Mhz PCI interface programming reference chip is Lattice
Platform: | Size: 8192 | Author: chenguochun | Hits:

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