Search - ldpc decoder verilog

[Communication-Mobile] Stanford_ldpca_demo_software

Description: stanford开发的LDPCA（LDPC码的改进）的编码器和解码器，以及几个码字。-stanford development LDPCA (LDPC codes to improve) the encoder and decoder, as well as several code words.
Platform: | Size: 6643712 | Author: algernon | Hits:

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

Description: 802.3an ldpc decoder verilog 源码
Platform: | Size: 884736 | Author: 杨振飞 | Hits:

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

Description: ldpc decoder 802-3an,最新版本,verilog版本.完成基于LDPC解码 -ldpc decoder 802-3an, the latest version, verilog version. LDPC decoder based on the completion
Platform: | Size: 884736 | Author: shen | Hits:

[VHDL-FPGA-Verilog] ps_decoder3_12_80_mod

Description: PS-LDPC码译码器的Verilog程序-PS-LDPC code decoder of the Verilog program
Platform: | Size: 29696 | Author: 王昆 | Hits:

[Program doc] QC-LDPC-decoder-FPGA

Description: 　文章提出了一种可以兼容不同码率规则和非规则准循环低密度校验码(LDPC)的部分并行译码结构, 用Verilog语言开发，基于该部分并行结构在Altera公司的StratixII-EP2S90器件上验-This paper presents a part of different bit rates can be compatible with the rules and irregular quasi-cyclic low density parity check code (LDPC) decoding parallel structure, parallel structure based on experience in the section on Altera s devices StratixII-EP2S90
Platform: | Size: 420864 | Author: 我问问 | Hits:

[3G develop] XOR_tree

Description: This source code is a check node unit for LDPC decoder. The language is Verilog HDL.
Platform: | Size: 4321280 | Author: Lee Jeahack | Hits:

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[Communication-Mobile] Stanford_ldpca_demo_software

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

[VHDL-FPGA-Verilog] ps_decoder3_12_80_mod

[Program doc] QC-LDPC-decoder-FPGA

[3G develop] XOR_tree

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