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[Other resource] 数字频率计实验报告

Description: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下： 测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形： 方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管 编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F / F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL / VHDL
Platform: | Size: 144900 | Author: 兰 | Hits:

[Books] ]FPGA设计指导手册PDF版

Description: FPGA设计指导手册PDF版 将如何设计fpga的,考虑了一些FGPA的关键问题可以参考一下 对初学者有帮助的-FPGA design instruction manual PDF version of the design they simply consider the FGPA some of the key issues for reference to help beginners
Platform: | Size: 260096 | Author: 沉沉 | Hits:

[VHDL-FPGA-Verilog] 数字频率计实验报告

Description: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下： 测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形： 方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管 编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
Platform: | Size: 144384 | Author: 兰 | Hits:

[VHDL-FPGA-Verilog] codeofvhdl2006

Description: 【经典设计】VHDL源代码下载～～ 其中经典的设计有：【自动售货机】、【电子钟】、【红绿灯交通信号系统】、【步进电机定位控制系统】、【直流电机速度控制系统】、【计算器】、【点阵列LED显示控制系统】 基本数字逻辑设计有：【锁存器】、【多路选择器】、【三态门】、【双向输入|输出端口】、【内部（缓冲）信号】、【编码转换】、【加法器】、【编码器/译码器】、【4位乘法器】、【只读存储器】、【RSFF触发器】、【DFF触发器】、【JKFF触发器】、【计数器】、【分频器】、【寄存器】、【状态机】 - [ Classics design ] the VHDL source code downloads ~ ~ classics the design to include: [ Vending machine ], [ electron clock ], [ traffic light traffic signal system ], [ step of 杩涚數 machine localization control system ], [ direct current machine speed control system ], [ calculator ], [ array LED display control system ] the basic numeral logical design includes: [ Latch ], [ multichannel selector ], [ 涓夋
Platform: | Size: 44032 | Author: senkong | Hits:

[Embeded-SCM Develop] key2led

Description: 跑马灯设计，主要基于altera FPGA平台设计。解压无需密码。-Bomadeng, designed altera FPGA-based design platform. Decompress without passwords.
Platform: | Size: 637952 | Author: 邓丰涛 | Hits:

[Books] 256LED

Description: 256级灰度LED点阵屏显示原理及基于FPGA的电路设计-256 gray-scale screen display LED dot-matrix theory and circuit design based on FPGA
Platform: | Size: 133120 | Author: watson | Hits:

[SCM] 256

Description: 256级灰度LED点阵屏显示原理及基于FPGA的电路设计 -256 gray-scale screen display LED dot-matrix theory and circuit design based on FPGA
Platform: | Size: 3072 | Author: 王 | Hits:

[VHDL-FPGA-Verilog] LEDhanzigundong_VHDL

Description: 本文主要讨论了使用EDA工具设计汉字滚动显示器的技术问题。文中首先描述了基于现场可编程门阵列（FPGA）的硬件电路；然后研究了在8×8LED发光二极管点阵上显示滚动汉字的原理，并给出了基于ALTERA的参数化模型库LPM描述其功能的VHDL语言程序设计；最后对使用EDA工具软件加工被显示数据文件的方法进行了讨论。-This paper mainly discusses the use of EDA tools for the design of Chinese characters scrolling display technology. First, the description based on field programmable gate array (FPGA) hardware circuit and then studied in the 8 × 8LED LED dot matrix display scroll principle characters, and gives ALTERA based on parameterized model library LPM Description its function in VHDL language programming Finally on the use of EDA software tools for processing data files being displayed method is discussed.
Platform: | Size: 185344 | Author: wang | Hits:

[SCM] 256LED

Description: 256级灰度LED点阵屏显示原理及基于FPGA的电路设计-256 gray-scale screen display LED dot-matrix theory and circuit design based on FPGA
Platform: | Size: 282624 | Author: hpx88 | Hits:

[VHDL-FPGA-Verilog] FPGA-drivenLEDdisplay

Description: FPGA驱动LED显示:运用硬件描述语言（如VHDL）设计一个显示译码驱动器，即将要显示的字符译成8段码。由于FPGA有相当多的引脚端资源，如果显示的位数N较少，可以直接使用静态显示方式，即将每一个数码管都分别连接到不同的8个引脚线上，共需要8×N条引脚线控制.-FPGA-driven LED display: the use of hardware description languages (such as VHDL) design a display decoder driver, about to show the characters to 8 yards. Because there is a considerable number of FPGA-pin-side resources, if shown the median N less, you can direct the use of a static display, the upcoming digital tube are each separately connected to a different 8-pin line, required a total of 8 × N Article pin line control.
Platform: | Size: 1024 | Author: 王娟 | Hits:

[Embeded-SCM Develop] cpldfpga

Description: 《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计-" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design
Platform: | Size: 283648 | Author: 付鋆 | Hits:

[VHDL-FPGA-Verilog] PWM_LED

Description: 基于ALTERA公司NIOSII的LED灯控PWM IP核设计-ALTERA-based company controlled NIOSII the LED lamp PWM IP-core design
Platform: | Size: 10481664 | Author: 王超 | Hits:

[Software Engineering] FPGA

Description: 基于FPGA芯片控制全彩LED大屏幕图像显示系统系统设计随着数字技术的飞速发展，各种数字显示屏也随即涌现出来有LED、LCD、DLP等，各种数字大屏幕的控制系统多种多样，有用ARM+FPGA脱机控制系统，也有用PC+DVI接口解码芯片+FPGA芯片联机控制系统，在这里我们讲述一种不仅可以用于控制全彩LED大屏幕的显示，而且还可以作为发送端输出高清图像数据。采用的联机控制系统对全彩LED大屏幕进行控制。即PC+DVI接口解码芯片+FPGA芯片+输出接口模式的联机控制系统-FPGA-based full-color LED chips to control large-screen image display system, system design with the rapid development of digital technology, digital displays have also emerged immediately LED, LCD, DLP, etc., all kinds of large-screen digital control system diverse and useful ARM+ FPGA offline control system, it also uses PC+ DVI interface decoder chip+ FPGA chip-line control system, we have described here can not only be used to control a full-color large screen LED display, but also can serve as a send ended output high-definition image data. Online control system used on large-screen full-color LED control. PC+ DVI interface that decoder chip+ FPGA chip+ output interface of the online control system model
Platform: | Size: 833536 | Author: 打狗队 | Hits:

[SCM] LED

Description: 本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA 公司的 Cyclone II 系列 FPGA 为数字平台，将微处理器、Avalon 总线、LED 点阵扫描控制器、存储器和人机接口控制器等硬件设备集中在一片 FPGA 上，利用片内硬件来实现 LED 点阵的带地址扫描，降低系统总功耗和简化 CPU 编程的同时，提高了系统的精确度、稳定性和抗干扰性能。-This design used the Nios II embedded processor based on SOPC technology. System to ALTERA' s Cyclone II series FPGA for digital platforms, microprocessors, Avalon bus, LED dot matrix scan controller, memory and man-machine interface controller and other hardware devices focused on an FPGA, using on-chip hardware to achieve the LED dot-matrix band address scan, reducing the total system CPU power consumption and simplify programming while increasing the system' s accuracy, stability and anti-jamming performance.
Platform: | Size: 968704 | Author: 叶子 | Hits:

[Program doc] led_zfsj

Description: 现场可编程门阵列( FPGA) 是一种可编程逻辑器件, 它具有丰富的I/O 口及内部资源, 编程和修改极为方便, 并且易于扩展和维护, 简化电子电路的设计。本系统采用Altera 公司的FLEX10K作为核心器件, 结合VHDL程序, 实现了对LED 点阵显示字符的控制。-Field programmable gate array (FPGA) is a programmable logic device, which has a wealth of I/O port and internal resources, programming and modification is very convenient and easy to extend and maintain, simplified the design of electronic circuits. The system uses Altera' s FLEX10K as a core device, combined with VHDL program, realized right LED dot matrix display character control.
Platform: | Size: 32768 | Author: x | Hits:

[Software Engineering] full-colorLED

Description: 用FPGA实现LED全彩屏系统设计方案，具有256级灰度显示-With the FPGA to achieve full-color LED system design, with 256 level gray-scale display
Platform: | Size: 290816 | Author: libobo | Hits:

[Software Engineering] dynamicLED

Description: 基于FPGA采用动态扫描方法设计大屏幕LED显示屏-FPGA dynamic scanning method based on large-screen LED display design
Platform: | Size: 372736 | Author: libobo | Hits:

[VHDL-FPGA-Verilog] led

Description: 基于fpga 设计LED显示电路，最终能实现组装-Fpga design based on the LED display circuit, and ultimately to achieve assembly
Platform: | Size: 269312 | Author: 王梁 | Hits:

[VHDL-FPGA-Verilog] led

Description: 利用计数器设计延时函数，通过四个led灯的闪烁，可以直观观察延时时长，fpga器件cyclone iv LCMXO2-1200HC-4TG144CR1,在demo板上作简路图(Using the counter to design the delay function, through the flashing of four LED lights, we can observe the delay time directly, FPGA device cyclone IV LCMXO2-1200HC-4TG144CR1, and make the simple path diagram on the demo board)
Platform: | Size: 3163136 | Author: qing wang | Hits:

[VHDL-FPGA-Verilog] 01_led_test

Description: 基于FPGA实现流水灯功能，LED等间隔亮起熄灭，(the use of digital FPGA design flow to achieve the runing water lights function)
Platform: | Size: 322560 | Author: 董进宇 | Hits:
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