Search - led vhdl

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[VHDL-FPGA-Verilog] LED.VHDL DL : 0: LED控制VHDL程序与仿真分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序-LED control procedures and VHDL simulation briefed on the use of FPGA LED static and dynamic significantly the figures show clock control procedures
Update : 2025-02-17 Size : 5kb Publisher : 少龙
[Other] LED DL : 0: 用VHDL 语言描述度7段LED数码显示管，其开发均在FPGA中-using VHDL description of 7 degrees LED digital display tubes, which were developed in FPGA
Update : 2025-02-17 Size : 120kb Publisher : 侯同
[VHDL-FPGA-Verilog] LED DL : 0: 基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code
Update : 2025-02-17 Size : 106kb Publisher : 林晋阳
[VHDL-FPGA-Verilog] led DL : 0: vhdl实现“PLD电子技术”（文字显示）-VHDL achieve PLD electronic technology (text)
Update : 2025-02-17 Size : 1kb Publisher : 阿乔
[VHDL-FPGA-Verilog] LED DL : 0: 以两种结构编写的VHDL驱动LED 已通过调试-err
Update : 2025-02-17 Size : 399kb Publisher : hbsun
[VHDL-FPGA-Verilog] LED DL : 0: 一个LED显示动态扫描方式的vhdl实现-An LED display dynamic scanning realize the VHDL
Update : 2025-02-17 Size : 5kb Publisher : xjz
[VHDL-FPGA-Verilog] led DL : 0: VERILOG实现LED的控制，实现动态刷新显示210。控制LED显示的模板程序-Verilog realization of LED control, dynamic refresh display 210. LED display control procedure template
Update : 2025-02-17 Size : 102kb Publisher : 张猛蛟
[VHDL-FPGA-Verilog] led DL : 0: 8位数码扫描显示电路设计（VHDL）通过编译-8 digital scanning display circuit design (VHDL) through compiler
Update : 2025-02-17 Size : 1kb Publisher : hh
[VHDL-FPGA-Verilog] led DL : 0: 10位8段LED的扫描显示程序，可以实现10位数的显示。-10脦禄8 露脦LED渭脛脡篓脙猫脧脭脢戮鲁脤脨貌拢卢驴脡脪脭脢渭脧脰10脦禄脢媒渭脛脧脭脢戮隆拢
Update : 2025-02-17 Size : 1kb Publisher : jz
[SCM] led DL : 0: led跑马灯的程序。请大家看看什么的地方要修复一些谢谢大家-Marquee led process. Please take a look at what some of the places to repair Thank you
Update : 2025-02-17 Size : 8kb Publisher : guang880
[Software Engineering] led DL : 0: 用EDA 设计LED 汉字滚动显示器,浅显易懂，设计简单-EDA design with Chinese characters scrolling LED display, easy to understand and is designed to be simple
Update : 2025-02-17 Size : 232kb Publisher : skyer
[VHDL-FPGA-Verilog] led DL : 0: LED显示功能，使用VHDL语言编程，基于FPGA-LED display, the use of VHDL language programming, based on FPGA
Update : 2025-02-17 Size : 1kb Publisher : juanjuan
[SCM] led DL : 0: 用一个按钮开关循环控制四个led灯的闪烁方式，输入时钟10MHz，闪烁频率1Hz-Button switch with a four cycle control lights flashing led the way, the input clock 10MHz, blinking frequency of 1Hz
Update : 2025-02-17 Size : 1kb Publisher : liyinghe
[Other] LED DL : 0: led display programme
Update : 2025-02-17 Size : 2kb Publisher : fancywoods
[Documents] vhdl DL : 0: 6位LED电子钟,非常实用实做过实验，自动报时，秒表-6 LED electronic clock, very useful experiment is done, automatic timer, stopwatch. . .
Update : 2025-02-17 Size : 4kb Publisher : 王睿
[VHDL-FPGA-Verilog] led DL : 0: 八段数码管的显示的小程序,环境是VHDL-0h
Update : 2025-02-17 Size : 103kb Publisher : mars343
[VHDL-FPGA-Verilog] LED DL : 0: LED控制VHDL程序与仿真可以很好的实现功能-VHDL program LED control and simulation, you can achieve very good feature!
Update : 2025-02-17 Size : 5kb Publisher : 唐光敏
[Other] 7-LED DL : 0: 如题目所示，将二进制码转换为7位LED显示-Such as the title indicates, will be converted into binary code 7 LED display
Update : 2025-02-17 Size : 1kb Publisher : wxw_s_life
[VHDL-FPGA-Verilog] 8-led-VHDL DL : 0: 8位流水灯程序设计，跑马灯效果显示，里面是VHDL程序。-8 water lamps program design, which is a VHDL program
Update : 2025-02-17 Size : 107kb Publisher : luo
[Other] led DL : 0: 七段LED数码显示器是数字系统中常用的数码显示元件，二进制数不能直接在LED数码管上显示，需要用一个BCD七段译码器进行译码。下图给出了一个七段显示译码器的框图及相应的七段LED数码管的示意图。-Seven-segment LED digital display is commonly used in digital systems digital display devices, a binary number can not be directly displayed on the LED digital tube, needed a seven-segment BCD decoder for decoding. The following figure shows a block diagram of seven-segment display decoder and the corresponding seven-segment LED digital tube schematic.
Update : 2025-02-17 Size : 29kb Publisher : 乐天猫

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