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[Applications] pci局部总线开发者指南

Description: pci局部总线开发者指南-PCI local bus Development Guide
Platform: | Size: 3204096 | Author: 周辉 | Hits:

[Embeded-SCM Develop] PCI

Description: PCI局部总线的中文教程，可以加快你对PCI总线通讯协议的学习理解。-PCI Local Bus Guide in Chinese, you can speed up your PCI bus communication protocol of the study and understanding.
Platform: | Size: 1171456 | Author: 何风 | Hits:

[VHDL-FPGA-Verilog] hgb_pci_host

Description: 内有一PCI 主 和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。 本PCI_HOST目前支持： 1、 对目标PCI_T进行配置； 2、 对目标进行单周期读写； 3、 可以工作在33MHZ和66MHZ 4、 支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的-There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of
Platform: | Size: 2712576 | Author: | Hits:

[VHDL-FPGA-Verilog] FPGA_8008

Description: pci pci转local bus总线的应用，使用IPcore alter器件-pci pci convert local bus application,use alter IP core
Platform: | Size: 493568 | Author: robincyh | Hits:

[Embeded-SCM Develop] plx9054-localbus-cpld-vhdl-src

Description: PLX 公司 PLX9054 pci target controller local bus interface vhdl programe-PLX inc. PLX9054 pci target controller local bus interface vhdl programe
Platform: | Size: 1024 | Author: richardz | Hits:

[Embeded-SCM Develop] pci.tar

Description: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transactions originating on the PCI bus, the other one handling transactions originating on the WISHBONE bus.
Platform: | Size: 13253632 | Author: yemao | Hits:

[VHDL-FPGA-Verilog] opencore_crt

Description: 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work
Platform: | Size: 683008 | Author: Joe | Hits:

[Other] PCI_introduction

Description: PCI局部总线的中文介绍，非常详细，对于不想阅读英文规范的同学们很有帮助。-PCI local bus in Chinese introduction, in great detail. And it is useful to who do not want to read English.
Platform: | Size: 1134592 | Author: Sean Zhong | Hits:

[VHDL-FPGA-Verilog] PCI_T32

Description: PCI-32转local bus-PCI-32 switch to local bus!!!!!!!!!!!!!!!!!!!!!!!
Platform: | Size: 919552 | Author: eric | Hits:

[VHDL-FPGA-Verilog] ADSP2011Local

Description: pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at regular intervals, resulting in increased data 1,2,3, etc., with pci9054 drivers and applications for data transmission 2 note: folders is Quartus 9.0 project file, use the Verilog language.
Platform: | Size: 4899840 | Author: | Hits:

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