Search - low pass filter VHDL

Search - low pass filter VHDL - List

[VHDL-FPGA-Verilog] FIR低通滤波器部分模块 DL : 0: 一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
Update : 2025-02-17 Size : 5kb Publisher : 吴健宇
[VHDL-FPGA-Verilog] Pall_FIR DL : 0: FIR低通滤波器得设计，采用并行算法设计-FIR low-pass filter was designed in parallel algorithm design
Update : 2025-02-17 Size : 1.91mb Publisher : luyingc
[VHDL-FPGA-Verilog] LowpassfilterVHDLcord DL : 0: 低通滤波器的VHDL代码，需要的可以下来看看，本人QQ147440013，有志同道合的人可以加我哦-Low-pass filter of the VHDL code, need to take a look at the can down, I QQ147440013, have like-minded people can add me, oh
Update : 2025-02-17 Size : 4kb Publisher : 黄建
[matlab] Matlab_butterfilter DL : 0: 基于matlab的低通滤波器代码，可以自动生成VHDL源代码-Based on the low-pass filter matlab code, you can automatically generate VHDL source code
Update : 2025-02-17 Size : 1kb Publisher : 黄建
[VHDL-FPGA-Verilog] rmfilter DL : 0: 低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code
Update : 2025-02-17 Size : 10kb Publisher : Rebecca
[Other] 17jie_fir DL : 0: 采用VHDL语言实现17阶的数字低通滤波器的设计-VHDL language used to achieve 17 the number of bands of low-pass filter design
Update : 2025-02-17 Size : 284kb Publisher : 望天
[DSP program] hpiir DL : 0: FPGA文件程序，irr型低通滤波器，vhd程序 -FPGA program file, irr-type low-pass filter, vhd procedures
Update : 2025-02-17 Size : 1.18mb Publisher : 袖手人
[Energy industry] Verilog DL : 0: 全加器的Verilog 实现代码寄存器的Verilog 实现代码-Low-pass filter integral part of full-adder and register the Verilog implementation code
Update : 2025-02-17 Size : 3kb Publisher : 田静
[Windows Develop] Desktop DL : 0: DDS数字频率合成DDS由相位累加器、正弦查找表、D／A转换器和低通滤波器组成 -DDS DDS DDS from the phase accumulator, sine look-up tables, D/A converter and low-pass filter composed of
Update : 2025-02-17 Size : 1kb Publisher : chenxiaofeng
[Other Embeded program] vhdl DL : 0: there is Design a butterworth low pass IIR filter. (a) Using butterworth to design an IIR low pass filter with Fs=8192hz and Fpass =1000 and Fstop =1200. You use the minimum order of filter. And match exactly at pass band. and other programs
Update : 2025-02-17 Size : 2kb Publisher : fathima
[Embeded Linux] 83390078DDS DL : 0: DDS的工作原理是以数控振荡器的方式产生频率、相位可控制的正弦波。电路一般包括基准时钟、频率累加器、相位累加器、幅度/相位转换电路、D/A转换器和低通滤波器（LPF）。频率累加器对输入信号进行累加运算，产生频率控制数据X（frequency data或相位步进量）。相位累加器由N位全加器和N位累加寄存器级联而成，对代表频率的2进制码进行累加运算，是典型的反馈电路，产生累加结果Y。幅度/相位转换电路实质上是一个波形寄存器，以供查表使用。读出的数据送入D/A转换器和低通滤波器。-DDS works the way we are digitally controlled oscillator frequency, phase controlled sine wave. Circuits generally include reference clock, frequency accumulator, phase accumulator, amplitude/phase converter circuit, D/A converter and low-pass filter (LPF). The frequency accumulator to accumulate the input signal operation to produce the frequency control data X (frequency data or phase stepping volume). From the N-bit phase accumulator and the N-bit full adder cascade accumulation register is made on behalf of the frequency of the two binary codes accumulation operation, is a typical feedback circuit, resulting in cumulative results of Y. Amplitude/phase converter circuit is essentially a waveform register for look-up table to use. Read out the data into the D/A converter and low pass filter.
Update : 2025-02-17 Size : 43kb Publisher : 394177191
[VHDL-FPGA-Verilog] lowpassfir DL : 0: Low pass fir filter for ecg signal in VHDL
Update : 2025-02-17 Size : 1kb Publisher : rohan
[Mathimatics-Numerical algorithms] fir_filter DL : 0: 该数字滤波器通过结合matlab和vhdl来实现低通fir数字滤波器功能-The digital filter through a combination of matlab and vhdl to achieve low-pass digital filter function fir
Update : 2025-02-17 Size : 26kb Publisher : caoge
[Other] IIr DL : 0: 十阶巴特沃斯低通滤波器设计（应用时域交叉原理编写的VHDL代码）-10-order Butterworth low pass filter design (application of principles of time-domain cross-written VHDL code)
Update : 2025-02-17 Size : 1kb Publisher : 郭兴祖
[VHDL-FPGA-Verilog] fir_filter DL : 0: 采用vhdl语言在Altera的开发板DE2-70上实现的低通滤波器的工程-Vhdl language used in the Altera DE2-70 development board to achieve the low-pass filter project
Update : 2025-02-17 Size : 14kb Publisher : 舒念
[VHDL-FPGA-Verilog] lowpassfilterdesign DL : 0: 用VHDL实现低通滤波器，里面有12篇论文都是介绍低通滤波器设计的。-Low pass filter with VHDL, which describes 12 papers were low pass filter design.
Update : 2025-02-17 Size : 4.93mb Publisher : 陈言
[Embeded-SCM Develop] LPfilter DL : 0: 16阶低通滤波器的VHDL实现，通过编译仿真，FPGA测试正确。-16-order low-pass filter VHDL implementation compile simulation, FPGA test correct.
Update : 2025-02-17 Size : 5.27mb Publisher : 陈言
[VHDL-FPGA-Verilog] FIR_128 DL : 0: FIR 128阶低通滤波器，由matlab仿真并在quartusII中实现-FIR 128 order low-pass filter
Update : 2025-02-17 Size : 358kb Publisher : 邱柳钦
[VHDL-FPGA-Verilog] filter DL : 0: 在DE2-70上运行的程序，程序是一个低通滤波器，滤波器用VHDL语言实现，已经过验证，可以放心使用。-DE2-70 to run the program, the program is a low-pass filter, the filter using VHDL, has been verified and is safe to use.
Update : 2025-02-17 Size : 41kb Publisher : 王骁蒙
[VHDL-FPGA-Verilog] fir-filter-design-with-VHDL.doc DL : 0: 用VHDL设计一个18阶fir低通滤波器文档(VHDL design with a fir-order low-pass filter 18 documents)
Update : 2025-02-17 Size : 5kb Publisher : sherry wang

« 12 »