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[Other74ls148

Description: 74LS148、74ls192、74ls48中国电子开发在线功能介绍-74LS148, 74ls192, 74ls48 the development of China' s electronics Online Features
Platform: | Size: 239616 | Author: name | Hits:

[VHDL-FPGA-Verilogls192

Description: vhdl,十进制加减计数器,输出计数序列信号-vhdl, decimal addition and subtraction counter, the output count sequence signal
Platform: | Size: 39936 | Author: 王晓虎 | Hits:

[VHDL-FPGA-Verilogmaiobiao

Description: 具有加、减计数以及置数报警功能的计数器,采用三个数码管显示,555产生1秒的脉冲,三块74ls192十进制计数器级联为三位数计数器。-Have add, subtract count, and buy several alarm function of counter, using three digital pipe display, 555 produce 1 second pulse, three pieces of 74 ls192 decimal counter level three digits backed counter.
Platform: | Size: 82944 | Author: 龙龙 | Hits:

[ELanguageshumaguan

Description: 基于编码器和译码器的数码管显示,数字芯片74ls48和74ls192,还有数码管-Based on the encoder and decoder of digital tube display, digital chip 74 ls48 and 74 ls192, and digital tube
Platform: | Size: 326656 | Author: 王坤 | Hits:

[Other Embeded programadd-plus

Description: 实现计数器加法、减法、清零电路。用7448、74ls192实现,可以仿真成功,适用于初学者。-Realization counter addition, subtraction, clear circuit. By 7448,74 ls192 achieve success can be simulated, for beginners.
Platform: | Size: 15360 | Author: 风轻扬 | Hits:

[Software EngineeringThe-buzzer

Description: 该抢答器主要运用到了编码器,译码器和锁存器:它采用74LS148来实现抢答器的选号,采用74LS279芯片实现对号码的锁存,采用74LS192实现十进制的减法计数,采用555芯片产生秒脉冲信号来共同实现倒计时功能,采用74LS121单稳态芯片来实现报警信号的输出。-The buzzer is mainly applied to the encoder, decoder and latch: it USES 74 ls148 to achieve responder pick, the number is realized by using 74 ls279 chip latches, decimal subtraction is realized by using 74 ls192 counter, using 555 chip to produce second pulse signal to realize the countdown function, using 74 ls121 monostable chip to realize the alarm signal output.
Platform: | Size: 25961472 | Author: 欧金华 | Hits:

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