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Description: Lacoally weighted Regression source code
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Size: 1705 |
Author: 陈月辉 |
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Description: Lacoally weighted Regression source code
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Size: 1024 |
Author: 陈月辉 |
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Description: 强局部加权回归算法由Cleveland[7]提出,主要利用局部观测数据对欲拟合点进行多项式加权拟合,并用最小二乘法进行估计.它综合了传统的局部多项式拟合,局部加权回归以及具有强鲁棒性的拟合过程
-Strong locally weighted regression algorithm by Cleveland [7] proposed, mainly using local observational data points on the polynomial fitting For weighted fitting, and estimated by least square method. It combines the traditional local polynomial fitting, locally weighted regression as well as strong robustness of the fitting process
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Size: 3072 |
Author: wanghuaqiu |
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Description: quartusII环境下实现FPGA与PCI9054通信。根据PCI9054规范控制lhold、lholda、ads、blast、lbe、lwr等握手信号的时序,可完成上位机通过PCI总线读写FPGA本地地址空间的功能-
Communication between FPGA and PCI9054 in QuartusII IDE.Implementation for the timing of handshake signals such as lhold, lholda, ads,blast,lbe,lwr etc.according to the specification of PCI9054 and fullfil the function of reading/writing data from/to local address of FPGA through PCI bus.
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Size: 1024 |
Author: |
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Description: 用Verilog HDL语言或VHDL语言来编写,实现多周期CPU设计。能够完成以下二十二条指令。(均不考虑虚拟地址和Cache,并且默认为大端方式):
add rd, rs, rt
addu rd, rs, rt
addi rt, rs, imm
addiu rt, rs, imm
sub rd, rs, rt
subu rd, rs, rt
nor rd, rs, rt
xori rt, rs, imm
clo
clz
slt rd, rs, rt
sltu rd, rs, rt
slti rt, rs, imm
sltiu rt, rs, imm
sllv rd,rt,rs
sra rd,rt,shamt
blez rs, imm
j target
lwl rt,offset(base)
lwr rt,offset(base)
lw rt,imm(rs)
sw rt,imm(rs)
-Written in Verilog HDL or VHDL language, multi-cycle CPU design. Able to complete the following 22 instructions. (Not taking into account the virtual address and the Cache, and the default is big endian):
add rd, rs, rt
addu rd, rs, rt
addi rt, rs, imm
addiu rt, rs, imm
sub rd, rs, rt
subu rd, rs, rt
of nor rd, rs, rt
xori rt, rs, imm
clo
clz
slt rd, rs, rt
sltu rd, rs, rt
slti rt, rs, imm
sltiu rt, rs, imm
sllv rd, rt, rs
sra rd, rt, shamt
blez rs, imm
j target
lwl rt, offset (base)
lwr rt, offset (base)
lw rt, imm (rs)
sw rt, imm (rs)
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Size: 5079040 |
Author: 徐帆 |
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Description: 用verilog HDL语言或者VHDL语言来编写,实现多时钟周期CPU的设计。能够完成以下二十二条指定(均不考虑虚拟地址和Cache,并且默认为小端方式):
add rd, rs, rt
addu rd, rs, rt
addi rt, rs, imm
addiu rt, rs, imm
sub rd, rs, rt
subu rd, rs, rt
nor rd, rs, rt
xori rt, rs, imm
clo
clz
slt rd, rs, rt
sltu rd, rs, rt
slti rt, rs, imm
sltiu rt, rs, imm
sllv rd, rt, rs
sra rd, rt, shamt
blez rs, imm
j target
lwl rt, offset(base)
lwr rt, offset(base)
lw rt, imm(rs)
sw rt, imm(rs)
-Verilog HDL language or VHDL language to write multi-clock cycle of the CPU design. To complete the following 22 specified (not taking into account the virtual address and the Cache and the default Xiaoduan):
add rd, rs, rt
addu rd, rs, rt
addi rt, rs, imm
addiu rt, rs, imm
sub rd, rs, rt
subu rd, rs, rt
of nor rd, rs, rt
xori rt, rs, imm
clo
clz
slt rd, rs, rt
sltu rd, rs, rt
slti rt, rs, imm
sltiu rt, rs, imm
sllv rd, rt, rs
sra rd, rt, shamt
blez rs, imm
j target
lwl rt, offset (base)
lwr rt, offset (base)
lw rt, imm (rs)
sw rt, imm (rs)Undo edits
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Size: 8877056 |
Author: 徐帆 |
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Description: 统计算法 里面很多经典的多元统计算法程序 PLS,PCR GA PCR-UVE PLS-UVE UVE-CV PLS-GA MLR LWR 人工神经网络 SPA LSS等-Statistical algorithms, there are many classic multivariate statistical algorithm PLS, PCR GA PCR-UVE PLS-UVE UVE-CV PLS-GA MLR LWR artificial neural network SPA LSS
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Size: 3372032 |
Author: 木华 |
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Description: Locally weighted regression (LWR) is a memory-based method that performs a regression around a point of interest using only training data that are ``local to that point. One recent study demonstrated that LWR was suitable for real-time control by constructing an LWR-based system that learned a difficult juggling task.-Locally weighted regression (LWR) is a memory-based method that performs a regression around a point of interest using only training data that are ``local to that point. One recent study demonstrated that LWR was suitable for real-time control by constructing an LWR-based system that learned a difficult juggling task.
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Size: 2048 |
Author: 肖邦 |
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Description: UC Berkeley提供的求解LWR宏观交通流模型的matlab工具箱-LWR resolver developed by UC Berkeley to resolve LWR traffic equations
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Size: 1777664 |
Author: jise |
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