Search - manchester decoder

[Software Engineering] AManchesterCodeDecodingSystemBased

Description: 本文在阐明反相对称调制（PISM）原理的基础上，结合曼彻斯特码的结构特点，给出了一种基于PISM原理的曼彻斯特码解码系统，并对其抗噪声性能进行了理论分析，揭示了曼彻斯特码潜在的抗噪声性能。-This article clarifies RP-symmetry modulation (PISM) on the basis of principle, Manchester code with the structural characteristics of a given based on the principle of PISM Manchester Decoder System and the anti-noise performance of the theoretical analysis reveals the Manchester code potential anti-noise performance.
Platform: | Size: 59577 | Author: 孔嘉 | Hits:

[Internet-Network] Mafffnchester

Description: 一个曼彻斯特编码解码器以及差分曼彻斯特编码解码程序，Vc＋＋6下编译通过-a Manchester encoding decoder difference Manchester encoding and decoding process, Vitamin C++ 6.0 compiler through
Platform: | Size: 229376 | Author: 杨圣湖 | Hits:

[Software Engineering] AManchesterCodeDecodingSystemBased

Description: 本文在阐明反相对称调制（PISM）原理的基础上，结合曼彻斯特码的结构特点，给出了一种基于PISM原理的曼彻斯特码解码系统，并对其抗噪声性能进行了理论分析，揭示了曼彻斯特码潜在的抗噪声性能。-This article clarifies RP-symmetry modulation (PISM) on the basis of principle, Manchester code with the structural characteristics of a given based on the principle of PISM Manchester Decoder System and the anti-noise performance of the theoretical analysis reveals the Manchester code potential anti-noise performance.
Platform: | Size: 59392 | Author: 孔嘉 | Hits:

[VHDL-FPGA-Verilog] mancheester_v

Description: 用Verilog HDL实现的曼彻斯特编码器和解码器。-Using Verilog HDL realize the Manchester encoder and decoder.
Platform: | Size: 9216 | Author: wangyunshann | Hits:

[ELanguage] manchester_verilog

Description: Manchester Encoder - Decoder for Xilinx CPLDs Customer Pack-Manchester Encoder- Decoder for Xilinx CPLDs Customer Pack
Platform: | Size: 9216 | Author: xbl | Hits:

[Mathimatics-Numerical algorithms] Text1

Description: 哈弗曼编码译码器，输入一段英文文字可以以实现哈弗曼译码-Harvard Manchester decoder coding, input a English word Can harvard to Manchester decoder
Platform: | Size: 2048 | Author: 宋双营 | Hits:

[VHDL-FPGA-Verilog] Manchester

Description: 曼彻斯特编解码源代码,还包含曼彻斯特码的说明文档-Manchester Encoder-Decoder
Platform: | Size: 40960 | Author: cst008 | Hits:

[VHDL-FPGA-Verilog] manch

Description: 该文件是一个完整的工程文件，用VerilogHDL语言编写，包括曼彻斯特编码器的设计文件和仿真测试文件以及解码器的设计文件和仿真测试文件。在Modelsim中仿真测试通过。-The document is a complete project file, with VerilogHDL languages, including the Manchester encoder design documents and simulation test files and decoder design documents and simulation test file. In the Modelsim simulation test.
Platform: | Size: 122880 | Author: dayu1994 | Hits:

[VHDL-FPGA-Verilog] mcsdte

Description: FPGA嵌入式项目实战，曼彻斯特编码器与译码器-FPGA embedded project combat, Manchester encoder and decoder
Platform: | Size: 186368 | Author: lan tian | Hits:

[Other] browse

Description: Manchester Decoder in 3 CLBs
Platform: | Size: 54272 | Author: malijun | Hits:

[VHDL-FPGA-Verilog] m2dec

Description: attached code is for implementing manchester decoder reference to HD6408 chip
Platform: | Size: 1024 | Author: basker | Hits:

[VHDL-FPGA-Verilog] manchester

Description: 源码包含三个模块，数据发送模块是读取FIFO中的数据后，将并行数据转换为串行，同时对串行数据进行曼彻斯特编码输出。数据接收模块是对接收的数据进行曼彻斯特解码。FIFO控制器模块将接收的串行数据转换为并行，并存储。曼彻斯特解码部分本文采用了过采样技术，使用了一个8倍时钟进行采样。每一个数据周期采样8次，每四次采样确定一个状态，如果采样到三次及以上高电平则认为是高状态，否则认为是低状态。状态由高到底则是数据0，由低到高则是状态1。-Source consists of three modules, data transmission module is to read the FIFO data, the parallel data into serial, while the Manchester encoded serial data output. Data receiving module is receiving data from the Manchester decoder. FIFO controller module will receive the serial data into parallel, and storage. Manchester decoding part of the paper, the sampling technique, using a sampling clock 8 times. Each cycle of data sampling eight times, four times per sample to determine a state, if the sample into three or more is considered high-high state, otherwise considered a low state. State data from high in the end is 0, from low to high is the state 1.
Platform: | Size: 4096 | Author: 陈建 | Hits:

[SCM] Manchester-decoder

Description: 完成了曼彻斯特解码，实现了读ID卡功能。单AVR。-Manchester finished reading decoding, realizes the function of ID card. The single AVR.
Platform: | Size: 39936 | Author: 马苗立 | Hits:

[VHDL-FPGA-Verilog] decoder

Description: 对于通信传输中常用的曼彻斯特编码给出了详细的Verilog程序，程序在Modelsim中调试通过。-For the transmission of commonly used Manchester coding are also given Verilog process, the process of debugging in Modelsim through.
Platform: | Size: 1024 | Author: LT | Hits:

[VC/MFC] lzq

Description: 曼切斯特解码的初始化程序设计，相信一定会适合大家的-Manchester decoder initialization program design, I believe would be suitable for everyone
Platform: | Size: 2048 | Author: 强 | Hits:

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[Software Engineering] AManchesterCodeDecodingSystemBased

[Internet-Network] Mafffnchester

[Software Engineering] AManchesterCodeDecodingSystemBased

[VHDL-FPGA-Verilog] mancheester_v

[ELanguage] manchester_verilog

[Mathimatics-Numerical algorithms] Text1

[VHDL-FPGA-Verilog] Manchester

[VHDL-FPGA-Verilog] manch

[VHDL-FPGA-Verilog] mcsdte

[Other] browse

[VHDL-FPGA-Verilog] m2dec

[VHDL-FPGA-Verilog] manchester

[SCM] Manchester-decoder

[VHDL-FPGA-Verilog] decoder

[VC/MFC] lzq

[VHDL-FPGA-Verilog] manchester-decoder-encoder

[Software Engineering] Manchester-coding.ZIP

[Console] 51-Manchester-decoder-source

[SCM] wireless-decoder

[VHDL-FPGA-Verilog] Manchester

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