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[Documents] Matlab与Modelsim联调

Description: Matlab与Modelsim联调的教程
Platform: | Size: 251314 | Author: houximei456 | Hits:

[VHDL-FPGA-Verilog] firmatlab

Description: fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过-fir in dspbuilder VHDL source code under test and document the incentive mat lab model, the simulation under through modelsim
Platform: | Size: 6144 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] fftmatlab

Description: fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 7168 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] ddsmatlab

Description: dds在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-dds dspbuilder under the VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 6144 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] sinmdlmatlab

Description: 正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 6144 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] DSP_BUILDER_DESIGN

Description: DSP Builder设计初步,介绍Matlab/DSP Builder及其设计流程，正弦信号发生器完整的设计过程，以及使用Matlab、quartusII\modelsim详细的仿真过程。-DSP Builder preliminary design, introduce Matlab/DSP Builder and its design flow, sinusoidal signal generator complete design process, and the use of Matlab, quartusIImodelsim detailed simulation.
Platform: | Size: 1370112 | Author: yehui | Hits:

[Books] matlabjy

Description: 《信号与系统》MATLAB仿真实验讲义.rar- Signals and Systems MATLAB simulation handouts. Rar
Platform: | Size: 498688 | Author: wupeng | Hits:

[VHDL-FPGA-Verilog] color_converter.tar

Description: 此代码实现不同图像颜色制式之间的相互转换，如XYZ<->RGB, 不同标准的RGB<->RGB 以及RGB<->YCbCr之间的转换，包内含有matlab仿真代码m文件、VHDL代码.v文件以及modelsim仿真的testbench文件，相信对大家有一定的帮助-This code different image color conversion between formats, such as XYZ <-> RGB, different standards of RGB <-> RGB and RGB <-> YCbCr conversion between packet contains code m file matlab simulation, VHDL code . v documents and ModelSim Simulation Testbench documentation, I believe everyone will certainly help
Platform: | Size: 339968 | Author: 王弋妹 | Hits:

[matlab] Application_in_FPGA_design_of_Matlab_simulink

Description: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点， 然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模 型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim 中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设 计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method.
Platform: | Size: 275456 | Author: 普林斯 | Hits:

[Books] ise_9.01shiyong

Description: 本章详细介绍了基于ISE的FPGA设计流程以及多个辅助工具（XST、XPower、PACE、ModelSim、Synplify以及MATLAB）的使用方法。首先介绍了ISE软件主要特性及其安装流程，然后介绍了如何通过ISE完成FPGA设计，-This chapter details the FPGA-based ISE design flow, as well as a number of auxiliary tools (XST, XPower, PACE, ModelSim, Synplify, and MATLAB) to use. First introduced the main features of ISE software and its installation process, and then describes how the adoption of ISE complete FPGA design,
Platform: | Size: 7639040 | Author: 马军辉 | Hits:

[matlab] matlab_modelsim

Description: Matlab 与 modelsim 协同仿真的例程设置好modelsim运行环境后，在源码路径执行manchester_tb，即可完成协同仿真的过程。-ModelSim co-simulation with Matlab routine ModelSim runtime environment is set up after the implementation of source path manchester_tb, to complete the process of co-simulation.
Platform: | Size: 41984 | Author: yangyu | Hits:

[Other] ClassicMODELSIMGuide

Description: MODELSIM经典教程 包括仿真的基本流程及各种问题 李永西安交大SOCSOC设计中心-Classical curriculum including simulation MODELSIM basic processes and issues SOCSOC LEE Wing Design Center in Xi' an Jiaotong University
Platform: | Size: 794624 | Author: 刘佳扬 | Hits:

[Other] FPGA_develope_manul

Description: 这是开源硬件提供的关于FPGA开发的一套电子书，讲得很详细，各种功能都有讲，包括跟matlab,modelsim一起使用的技巧。-This is the open-source FPGA hardware provided on the development of a set of books, talk about a very detailed and have a talk about the various functions, including with matlab, modelsim used in conjunction with skills.
Platform: | Size: 9175040 | Author: 纪伟 | Hits:

[Algorithm] cordic_atan

Description: 用verilog语言实现计算反正切函数，在软件无线电中解调PM/FM中使用的尤为频繁。上传的压缩包是modelsim工程，基于6.5c,里边包含一个完整的PM波产生以及解调过程的matlab文件仿真，并取其中间的I和Q支路做为verilog文件的输入，并将其借条输出与MATLAB实际解调输出作比较。 鉴相器的设计基于CORDIC算法，其精度取决于迭代的深度。由于工程实际运用只需要解调出atan值，并不需要绝对的值，所以并没有给予加权，需要的同学可以自己加上。-Calculated using verilog language arc tangent function, the software radio demodulation PM/FM is particularly used frequently. From the archive is modelsim project, based on 6.5c, inside the PM contains a complete demodulation process of wave generation and simulation matlab file, and whichever is the middle of the I and Q branch verilog file as input, and its IOU demodulated output and actual output of MATLAB for comparison. Phase detector design is based on CORDIC algorithm, its accuracy depends on the iteration depth. As the practical application of engineering demodulated atan value only and does not need absolute value, and there is no weight given to the need of the students can add their own.
Platform: | Size: 79872 | Author: Jorge | Hits:

[Other] 61i_atan_cordic_v2_0_vhdl_ise

Description: my_atan_cordic.xco - Core parameter file my_atan_cordic.vho - Core VHDL instantiation template my_atan_cordic.vhd - Core VHDL simulation file (only for simulation) my_atan_cordic.edn - Core EIDF netlist (only for implementation) x_in_cos.dat - input data for the simulation (only for simulation) y_in_cos.dat - input data for the simulation (only for simulation) cordic_functional.do - ModelSim do file for functional simulation cordic_timing.do - ModelSim do file for timing simulation design_top.ucf - contrsaints file (only for implementation) design_top.vhd - VHDL toplevel design_top_tb.vhd - VHDL testbench
Platform: | Size: 118784 | Author: d | Hits:

[DSP program] fir-filter-in-Matlab-and-Modelsim

Description: 基于DSP Builder的fir滤波器，及在Modelsim上仿真工程文件，是在做基于FPGA的fir滤波器的一部分-The DSP Builder-based fir filter, and on the simulation project file in Modelsim is doing FPGA-based fir filter part of the
Platform: | Size: 10390528 | Author: pei | Hits:

[VHDL-FPGA-Verilog] fir_lowpass

Description: 硬件语言实现数字低通滤波器，使用ise11.1和modelsim se6.5 仿真测试-Hardware language digital low pass filter, the use of simulation testing ise11.1 and modelsim se6.5
Platform: | Size: 545792 | Author: linzi | Hits:

[Program doc] Matlab-and-Modelsim

Description: matlab怎么把数据输入到modelsim，文件读写的问题-data write and read from matlab to modelsim
Platform: | Size: 160768 | Author: xiaowang | Hits:

[VHDL-FPGA-Verilog] VLSI-Project-Median-filer

Description: FPGA和ASIC实现的图像中值滤波模块，各模块的仿真结果以及MATLAB,Modelsim联合仿真。这是中科大超大规模集成电路设计优化的final project。附有最终版的report和presention。-FPGA and ASIC implementation of image filtering modules, each module of the simulation results and MATLAB, Modelsim co-simulation. This is the USTC VLSI design optimization final project. With the final version of the report and the presention.
Platform: | Size: 14795776 | Author: 刘星宇 | Hits:

[VHDL-FPGA-Verilog] quartus和modelsim中使用mif和hex文件1

Description: quartus和modelsim中使用mif和hex文件1(fpga modelsim mif hex)
Platform: | Size: 52224 | Author: 打酱油啊 | Hits:
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