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[VHDL-FPGA-Verilog] simulink-03-31 DL : 0: 基于MATLAB/DSP Ｂuild可控信号发生器，由Ｍatlab建模综合，并生成ＶＨＤＬ代码，由Ｑuartus编译通过．-Based on MATLAB/DSP Build controllable signal generator, by the Matlab modeling synthesis, and generates VHDL code, adopted by the Quartus compiler.
Update : 2025-02-19 Size : 291kb Publisher : ltianyang
[matlab] Application_in_FPGA_design_of_Matlab_simulink DL : 0: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点，然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim 中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method.
Update : 2025-02-19 Size : 269kb Publisher : 普林斯
[VHDL-FPGA-Verilog] FPGA_NEW_APPROACH_TO_IMPLEMENT_CHAOTIC_GENERATOR. DL : 0: In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is based on the MATLAB® Software, Xilinx System Generator, Xilinx Alliance tools and Synplicity Synplify.-In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is based on the MATLAB® Software, Xilinx System Generator, Xilinx Alliance tools and Synplicity Synplify.
Update : 2025-02-19 Size : 248kb Publisher : gsbnd
[VHDL-FPGA-Verilog] MATLAB_sg_IP DL : 0: 使用MATLAB为System Generator for DSP创建IP-The use of MATLAB for System Generator for DSP to create IP
Update : 2025-02-19 Size : 39kb Publisher : lxd
[matlab] ASK-OOK-FSK-BPSK DL : 0: MATLAB实现ASK, OOK, FSK, BPSK, QPSK, 8PSK调制源代码-Free Source Code for ASK, OOK, FSK, BPSK, QPSK, 8PSK Digital Modulation in FPGAs Xilinx using system generator (ASK, BPSK, FSK, OOK, QPSK)
Update : 2025-02-19 Size : 56kb Publisher : chenkui
[matlab] sysgen_gs DL : 0: Xilinx system generator的上手指南，system generator用于在matlab中使用simulink设计硬件，很方便-guide of system generater by Xilinx
Update : 2025-02-19 Size : 1.61mb Publisher : 王静
[matlab] MATLAB-sg-DSP-IP DL : 0: 使用MATLAB为System Generator for DSP创建IP-The use of MATLAB for System Generator for DSP to create IP
Update : 2025-02-19 Size : 39kb Publisher : lxd
[VHDL-FPGA-Verilog] lab4 DL : 0: system generator/simulink 应用开发4，User Starting
Update : 2025-02-19 Size : 118kb Publisher : troy
[Software Engineering] SG DL : 0: 这是一个关于的System Generator的软件教程，对于这个软件的初学者，这个篇文章有很大的帮助。-This is the one on the System Generator software tutorials for this software for beginners, this article of great help.
Update : 2025-02-19 Size : 2.49mb Publisher : 吴桂琴
[Other] DUC DL : 0: 基于软件无线电的SFF平台，采用Xilinx System Generator实现的数字上变频器-SFF platform based on software radio, using Xilinx System Generator to achieve digital upconverter
Update : 2025-02-19 Size : 52kb Publisher : 刘荣毅
[matlab] OFDM_System_Generator DL : 0: Model of OFDM transmiter based on System Generator in Matlab
Update : 2025-02-19 Size : 453kb Publisher : Mike
[matlab] DP_1_5_SI_mdl DL : 0: this the simulation of the four generator system which is based on the K.r.Padhiyar book the load flow data and the line data is taken from this buk..... the students those are new in the simulation in matlab can refer this simulation and work on this ...... -this is the simulation of the four generator system which is based on the K.r.Padhiyar book the load flow data and the line data is taken from this buk..... the students those are new in the simulation in matlab can refer this simulation and work on this ......
Update : 2025-02-19 Size : 12kb Publisher : Arvind
[DSP program] OFDM_Security DL : 0: This a Simulink model that demonstrates an algorithm that applies wireless security on physical layer. The demonstration is based on 802.11a (simplified) and receiver is implemented on Xilinx Virtex 4 FPGA. The RAR file inlcudes 2 files: 1. Simulink model 2. initialization file. Software requirements: 1. Matlab, r2007a or later 2. Simulink with DSP and Comm blocksets 3. Xilinx ISE with System Generator for DSP 9.2i or later.
Update : 2025-02-19 Size : 157kb Publisher : 徐滨
[matlab] wind-power-generation-system DL : 0: 有关风力发电系统的文章，包含发电机的设计，整流逆变电路-Articles on wind power generation system, including the design of the generator, rectifier inverter circuit, etc.
Update : 2025-02-19 Size : 1.55mb Publisher : 向露萍
[VHDL-FPGA-Verilog] CIC DL : 0: CIC算法的FPGA，matlab和System Generator实现。-CIC；FPGA；matlab；System Generator
Update : 2025-02-19 Size : 69kb Publisher : shkl516
[matlab] MATLAB-Function-List DL : 0: MATLAB7.X信号处理工具箱函数汇总 1、滤波器分析与实现 2、 FIR数字滤波器设计 3、 IIR数字滤波器设计 4、模拟滤波器设计 5、模拟滤波器变换 6、滤波器离散化 7、线性系统变换 8、窗函数 9、变换 10、统计信号处理与谱分析 11、参数模型 12、线性预测 13、多采样率信号处理 14、波形产生 15、特殊操作-MATLAB7.X Signal Processing Toolbox functions Rollup 1, filter analysis and implementation of 2, FIR digital filter design 3, IIR digital filter design 4, 5 analog filter design, analog filter transform 6, 7 discrete filter, 8 linear system transformation, the window function 9, 10 transformation, statistical signal processing and spectrum analysis 11, 12-parameter model, linear prediction 13, 14 of multirate signal processing, waveform generator 15, a special operation
Update : 2025-02-19 Size : 26kb Publisher : zhaohengzheng
[SCM] FPGA-design-and-verification-using-Simulink DL : 0: Xilinx System Generator for DSP is a MATLAB Simulink block set that facilitates system design. Targeting Xilinx FPGAs within the familiar MATLAB environment, System Generator for DSP gives you the ability to functionally simulate a design and use the MATLAB environment to verify bit- and cycle-true models against the golden reference results. These reference results can be produced either externally or inside the MATLAB environment, and you can target a Xilinx FPGA hardware platform all within MATLAB. System Generator complements HDL design tasks by providing an easily configured test bench for both functional-Xilinx System Generator for DSP is a MATLAB Simulink block set that facilitates system design. Targeting Xilinx FPGAs within the familiar MATLAB environment, System Generator for DSP gives you the ability to functionally simulate a design and use the MATLAB environment to verify bit- and cycle-true models against the golden reference results. These reference results can be produced either externally or inside the MATLAB environment, and you can target a Xilinx FPGA hardware platform all within MATLAB. System Generator complements HDL design tasks by providing an easily configured test bench for both functional
Update : 2025-02-19 Size : 134kb Publisher : jayaprada
[Special Effects] 15010120041_高瑞雪_lab2 DL : 0: 在本实验中，将使用System Generator for DSP创建一个带乘法器和累加器的12-bit x 8-bit MAC（Multiplier Accumulator），并使用System Generator 的Resource Estimator块来估计资源利用率。在仿真Simulink中的设计之后，将从该设计中生成VHDL代码和内核，并在Xilinx ISE Foundation开发软件中实现MAC。(Design, construct and verify the specified MAC - based bandpass filter using the basic block of the system generator)
Update : 2025-02-19 Size : 782kb Publisher : 瑞雪儿
[matlab] Lab1 DL : 0: Lab for system generator from xilinx
Update : 2025-02-19 Size : 366kb Publisher : bilalo
[matlab] Lab1_3.slx DL : 0: TP lab3 system generator
Update : 2025-02-19 Size : 40kb Publisher : bilalo

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