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Description: 96位矩阵循环乘法,verilog实现,-96 matrix multiplication cycle, verilog realized,
Platform: | Size: 1024 | Author: 王佳 | Hits:

[VHDL-FPGA-Verilogetd-0407109-183702-81-001[1]

Description: 文章介绍了YUV向RGB颜色空间转换的硬件电路实现算法.在高基乘法算法基础上,建立了参数化高基乘法算法模型,并给出了Verilog HDL描述 小数乘法的整数乘法近似和近似误差给予了详细的讨论.采用乘法单元复用的设计结果将在两个时钟周期内完成YUV向RGB的颜色空间转换.-This paper introduces the YUV to RGB color space conversion hardware algorithm. Matrix multiplication algorithm in high-was established based on a parametric model of the high base multiplication algorithm, and gives the Verilog HDL description decimal multiplication and integer multiplication approximation error of approximation give a detailed discussion. using multiplication unit design reuse results will be completed in two clock cycles YUV to RGB color space conversion.
Platform: | Size: 3997696 | Author: jjj | Hits:

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