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[Crack Hack] MD5(verilog)

Description: MD5算法的verilog实现，同时包含有testbench。-Verilog of MD5 algorithm is realized, includes testbench at the same time .
Platform: | Size: 4806 | Author: 张雷 | Hits:

[Crack Hack] MD5(verilog)

Description: MD5算法的verilog实现，同时包含有testbench。-Verilog of MD5 algorithm is realized, includes testbench at the same time .
Platform: | Size: 4096 | Author: 张雷 | Hits:

[Crack Hack] Analyse_QQprotocol

Description: qq协议分析辅助，包括2次md5加密，tea加密解密-qq protocol analysis support, including the 2nd md5 encryption, encryption and decryption of tea
Platform: | Size: 152576 | Author: huaiyu | Hits:

[VHDL-FPGA-Verilog] md5

Description: MD5 算法在Xilinx FPGA上的实现，希望对大家有用。-MD5 algorithm in Xilinx FPGA Implementation, in the hope that useful to everyone.
Platform: | Size: 10240 | Author: 张开文 | Hits:

[Crack Hack] md5.tar

Description: MD5 Hash Verilog code
Platform: | Size: 10240 | Author: ahmadyan | Hits:

[CA auth] md5_latest[1][1].tar

Description: MD5算法verilog代码，很不错的，可以互相交流学习-MD5 algorithm verilog code, and a very good
Platform: | Size: 15360 | Author: 朱坤旺 | Hits:

[Other Embeded program] pancham-0.5

Description: pancham for MD5 hash function
Platform: | Size: 30720 | Author: harini | Hits:

[VHDL-FPGA-Verilog] rsa

Description: FORFPGA IMPLEMENTATION OF RSA ALGORITHM USING HDL
Platform: | Size: 227328 | Author: HIMANSHU SINGH | Hits:

[Crack Hack] HMAC-MD5

Description: HMAC — MD 5算法的硬件实现，可以对初学者有一定得帮助。-HMAC- MD 5 algorithm for hardware implementation
Platform: | Size: 179200 | Author: zhangchaoqi | Hits:

[Other] TSELEPIS-BEKAKOS-NIKITAKIS-LIPITAKIS-1[1]

Description: Verilog code for MD5 algorithm
Platform: | Size: 118784 | Author: NoOneLF | Hits:

[VHDL-FPGA-Verilog] md5-project

Description: The complete MD5 chip Verilog source
Platform: | Size: 8192 | Author: zoran wowa | Hits:

[Crack Hack] pancham-0.5

Description: MD5 open verilog code
Platform: | Size: 29696 | Author: lawrence | Hits:

[VHDL-FPGA-Verilog] 20161122_ff

Description: MD5认证部分的第一轮中包含F函数的一次操作的FPGA实现源代码，采用Verilog，在Quartus II上综合-MD5 authentication part of the first round contains an F function of the operation of the FPGA implementation of the source code, using Verilog, integrated in the Quartus II
Platform: | Size: 326656 | Author: 柳广兴 | Hits:

[VHDL-FPGA-Verilog] 20161122_gg

Description: MD5认证部分的第二轮中包含G函数的一次操作的FPGA实现源代码，采用Verilog，在Quartus II上综合-FPGA contains one operation in the second round of the G function MD5 authentication component implementation source code, using Verilog, synthesis in Quartus II
Platform: | Size: 321536 | Author: 柳广兴 | Hits:

[VHDL-FPGA-Verilog] 20161203_hh

Description: MD5认证部分的第三轮中包含H函数的一次操作的FPGA实现源代码，采用Verilog，在Quartus II上综合-FPGA third round included H functions in one operation MD5 authentication component implementation source code, using Verilog, synthesis in Quartus II
Platform: | Size: 295936 | Author: 柳广兴 | Hits:

[VHDL-FPGA-Verilog] 20161203_ii

Description: MD5认证部分的第四轮中包含I函数的一次操作的FPGA实现源代码，采用Verilog，在Quartus II上综合-The fourth round MD5 authentication section contains FPGA one operation I Functions of the source code, using Verilog, synthesis in Quartus II
Platform: | Size: 308224 | Author: 柳广兴 | Hits:

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