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[Other] taxiwork

Description: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性。-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the possibility.
Platform: | Size: 9216 | Author: 柑佬 | Hits:

[VHDL-FPGA-Verilog] SystemOfTaxiFeeBasedOnVerilogHDL

Description: 摘 要：以上海地区的出租车计费器为例，利用Verilog HDL语言设计了出租车计费器，使其具有时间 显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示 了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。源程序经MAX+PLUS Ⅱ软件调试、优 化，下载到EPF1OK10TC144—3芯片中，可应用于实际的出租车收费系统。 关键词：Verilog HDL；电子自动化设计；硬件描述语言；MAX+PLUSⅡ-Abstract: Shanghai taxi meter as an example, the use of Verilog HDL language designed taxi meter so that it will have the time display, billing, as well as analog taxis to start, stop, reset and other functions, and set up a dynamic scanning circuit shows that the fare and the corresponding time, shows the hardware description language Verilog-HDL design of the superiority of digital logic circuits. Source by MAX+ PLUS Ⅱ software debugging, optimization, downloaded to EPF1OK10TC144-3 chip, can be applied to the actual taxi fare collection system. Keywords: Verilog HDL electronic design automation hardware description language MAX+ PLUS Ⅱ
Platform: | Size: 211968 | Author: 杨轶帆 | Hits:

[SCM] taxi

Description: 用单片机实现出租车计价器的源码，是参加全国大学生电子设计比赛的训练时写的， 和普通的计价器比，考虑到实际多种情况与环境。-MCU Taximeter realize the source, is take part in the National Undergraduate Electronic Design Contest for writing training, and general than the meter, taking into account the actual range of conditions and the environment.
Platform: | Size: 110592 | Author: zhuangxb | Hits:

[Software Engineering] taxi

Description: 本电路设计的计价器不但能实现基本的计价，而且还能根据白天、黑夜、中途等待来调节单价，同时在不计价的时候还能作为时钟为司机同志提供方便。-The circuit design of the meter will not only realize the basic valuation, but also according to the daytime, night, halfway to wait to adjust the unit price, while not denominated as a time clock can also provide convenience for the drivers comrades.
Platform: | Size: 176128 | Author: | Hits:

[SCM] chuzhuchejijiao

Description: 通过单片机的设计实现出租车的计价器的功能 -Through the single-chip design of the meter taxi realize the function of
Platform: | Size: 118784 | Author: zj | Hits:

[VHDL-FPGA-Verilog] taxi-vhdl

Description: 出租车计费器 硬件描述语言 出租车计费器 MAX+PLUS软件 数字系统-Taxi billing hardware description language taxi meter MAX+ PLUS software digital systems
Platform: | Size: 48128 | Author: aneeee | Hits:

[VHDL-FPGA-Verilog] EDAdesign(3)

Description: 该文件中是关于一些VHDL许多编程实例以及源码分析，希望对VHDL爱好者有用。卷3包括车载DVD位控系统、直接数字频率合成器、图像边缘检测器、等精度数字频率计、出租车计费系统的设计与分析-The document is on a number of VHDL source code in many programming examples and analysis, in the hope that useful VHDL enthusiasts. Car DVD Volume 3 includes digital control system, direct digital frequency synthesizer, image edge detector, such as precision digital frequency meter, taxi Accounting System Design and Analysis
Platform: | Size: 4392960 | Author: shengm1 | Hits:

[SCM] 1

Description: 的士计费表,一些c语言程序，详细，大大的大大的-Taxi meter, a number of c language program in detail, much of the greatly
Platform: | Size: 3072 | Author: 陈青 | Hits:

[VHDL-FPGA-Verilog] eda

Description: 用VHDL编写的一个出租车计费器，起步6元计2公里，此后每半公里计0.8元，停车等待每2.5分计0.8元。通过仿真，但未下载到CPLD测试-Using VHDL prepared a taxi meter, starting 6 dollars two kilometers, and thereafter every half a kilometer of 0.8 yuan, parking to wait for every 2.5 hours of 0.8 yuan. Through simulation, but not downloaded to the CPLD test
Platform: | Size: 164864 | Author: 左大 | Hits:

[File Format] chuzuchejifeiqi

Description: 出租车计费器 课程设计报告 详细介绍其工作原理及工作过程-Taxi meter course design report details of its working principle and working process
Platform: | Size: 120832 | Author: will | Hits:

[SCM] tt1

Description: 出租车计价器的使用，可以使得出租车计费更清晰透明。该出租车计价器由51系列单片机、按键、LED数码管和光电信号采集部分组成。除具有基本路程计价的功能以外，该系统还具有等待计价的功能，能使出租车计价更合理。-The use of the meter taxi cab, can make more clear transparent billing. The meter taxi by 51 series microcontroller, buttons, LED digital signal acquisition and tube parts. Besides basic route, and the function of the pricing system also has the function of valuation, waiting for a taxi can make more reasonable valuation.
Platform: | Size: 1024 | Author: 陈庆全 | Hits:

[Other Embeded program] taxi

Description: 出租车自动计价器设计 要求： 计一个出租车计价器。 该计价器的计费系统：行程 3公里内，且等待累计时间2分钟内，起步费为10元；3公里外以每公里1.6元计费，等待累计时间2分钟外以每分钟以1.5元计费。 并能显示行驶公里数、等待累计时间、总费用。 -Taxi automatic meter design requirements: 1 meter taxi meter. The meter' s billing system: stroke within 3 km, and the total waiting time of 2 minutes, the starting fee is 10 yuan 3 kilometers away, charging 1.6 yuan per kilometer, waiting outside the aggregate time of 2 minutes to 1.5 yuan per minute billing. And can show the number of road miles, waiting for the accumulated time, the total cost.
Platform: | Size: 54272 | Author: dws | Hits:

[assembly language] taxi

Description: 微机原理课程实验，为出租车计价器汇编语言编写，另附实验报告。-Microcomputer Principles course experiment for the taxi meter written in assembly language, attached lab report.
Platform: | Size: 47104 | Author: sky | Hits:

[VHDL-FPGA-Verilog] taxi

Description: 基于VHDL出租车计价器的设计，能实现出租车载客过程的计费作用。-VHDL-based design of a taxi meter, taxi passengers can realize the process of charging effect.
Platform: | Size: 130048 | Author: 猪猪 | Hits:

[VHDL-FPGA-Verilog] taxi

Description: 基于FPGA的出租车计费器 所要设计的出租车计价器，要求能够显示里程数和乘客应付的费用，其中里程数精确到0．1km，乘客应付的费用精确到O．1元，显示必须以十进制的形式来进行。出租车的计费标准为：起步价6元，里程在3 km以内均为起步价；里程在3～7 km之间时，每行驶1 km增加1．6元；超过7 km时，每行驶1 km增加2．4元。-FPGA-based taxi meter by meter taxi to design, requires the ability to show mileage and passengers to meet the costs, including mileage is accurate to 0.1km, exact passenger fees payable to the O. 1 yuan, indicating the need to carry out in decimal form. Taxi billing criteria: prices starting at 6 yuan, less than 3 km in length are starting price distance between the 3 ~ 7 km, each driving 1 km 1.6 yuan 超过 7 km, each driving 1 km 2.4 yuan to increase.
Platform: | Size: 199680 | Author: wangzexiang | Hits:

[VHDL-FPGA-Verilog] taxi

Description: 出租车自动计费器，使用verilog hdl语言编写，计费包括起步费、里程费、等待费，并利用八位数码管显示。-Automatic meter taxi, using verilog hdl language, including start charging fees, mileage fees, waiting costs, and use eight digital display.
Platform: | Size: 7947264 | Author: 金若梅 | Hits:

[VHDL-FPGA-Verilog] taxi-meter-VHDL-design

Description: 这是基于VHDL的出租车计价器设计，可以当作来参考。-This is based on the taxi meter VHDL design can be used as to reference.
Platform: | Size: 121856 | Author: 猪大 | Hits:

[SCM] The-meter-taxi-speech-intelligence

Description: 本程序实际与SPCE061A单片机的语音智能出租车计价器的设计，本程序集成语音菜单，密码断电保护，等一系列功能-This program is actually the voice chip with SPCE061A taxi meter intelligent design, the program integrates voice menu, password protection off, and a series of functions
Platform: | Size: 1002496 | Author: hairui | Hits:

[VHDL-FPGA-Verilog] Meter-taxi

Description: 我自己写的在STC（AT）89C51上用的出租车计价器程序，绝对可用的，放心下载吧-I wrote in the STC (AT) on the 89 C51 with the meter taxi program, absolute available, feel free to download it
Platform: | Size: 62464 | Author: fairy | Hits:

[Other] taxi meter & source code

Description: This is a taxi meter design and separate source code screenshot of the source code.
Platform: | Size: 64512 | Author: blamelessjoe | Hits:
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