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[Other resource] xapp134_vhdl

Description: The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.
Platform: | Size: 2628213 | Author: ronsullivan | Hits:

[VHDL-FPGA-Verilog] mt48lc8m16a2

Description: sdram的行为级模拟模块,可以模拟一个sdram,用于仿真对sdram的控制.-sdram behavioral simulation module can simulate a sdram. Simulation for the control of sdram.
Platform: | Size: 6144 | Author: hxwf801 | Hits:

[VHDL-FPGA-Verilog] sdram_verilog

Description: 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic
Platform: | Size: 414720 | Author: | Hits:

[VHDL-FPGA-Verilog] xapp134_vhdl

Description: The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.-err
Platform: | Size: 2628608 | Author: ronsullivan | Hits:

[VHDL-FPGA-Verilog] Micron_SDRAM_DDR2Simulation_model_Verilog

Description: DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
Platform: | Size: 20480 | Author: rar | Hits:

[VHDL-FPGA-Verilog] webCam-FPGA

Description: 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
Platform: | Size: 36864 | Author: NOOW | Hits:

[VHDL-FPGA-Verilog] c_xapp454

Description: 这是xilinx应用指南xapp454的中文版本。本应用指南说明与 Micron DDR2 SDRAM 器件连接时，Spartan™ -3 器件中 DDR2 SDRAM 存储器接口的实现。本文档先简单介绍了 DDR2 SDRAM 器件的特性，然后对 DDR2 SDRAM 存储器接口的实现进行了详细说明。-This is the xilinx application note xapp454 the Chinese version. This application note and the Micron DDR2 SDRAM device is connected, Spartan ™ -3 devices DDR2 SDRAM memory interface implementation. This document briefly describes the DDR2 SDRAM device features, and then the realization of DDR2 SDRAM memory interface is described in detail.
Platform: | Size: 217088 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] verilog_sdram

Description: SDRAM读写控制的实现与Modelsim仿真,采用verilog HDL编写-sdram controller and simulate with modelsim
Platform: | Size: 2176000 | Author: bigchop ma | Hits:

[VHDL-FPGA-Verilog] sdram_controller

Description: SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip design, as a module to work.
Platform: | Size: 9216 | Author: Jerd Hu | Hits:

[ARM-PowerPC-ColdFire-MIPS] 52K_19200_1_2010.02.08.16.06.44_4247_KO[1].pdf.zi

Description: DDR3 SDRAM datasheet please refer want to development DDR3 Controller
Platform: | Size: 1479680 | Author: mil | Hits:

[VHDL-FPGA-Verilog] sdram_models

Description: MICRON公司SDRAM的各种仿真模型，可以用于各种仿真环境-sdram simulation model
Platform: | Size: 63488 | Author: oaksun | Hits:

[VHDL-FPGA-Verilog] micron_sdram_simulation_model

Description: micron各种规格的SDRAM的仿真模型及详细设计资料，基于verilog语言。-micron variety of SDRAM simulation model and detailed design information, based on the verilog language.
Platform: | Size: 64512 | Author: 李志 | Hits:

[VHDL-FPGA-Verilog] verilog_sdram_controller_testbench

Description: SDRAM 控制器 ，Verilog版本的，带有完整的SDRAM 仿真模型，testbench等，能够实际使用，并且利于学习-The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with backannotated simulation at 125MHz
Platform: | Size: 309248 | Author: 严刚 | Hits:

[VHDL-FPGA-Verilog] sdram_vhd_134

Description: Design Description: The SDRAM controller is designed for a Virtex device. It s simulated with Micron SDRAM models. The design is verified with backannotated simulation at 125MHz. For a full functional description see Application Note 134: http://www.xilinx.com/xapp/xapp134.pdf
Platform: | Size: 407552 | Author: shangdawei | Hits:

[VHDL-FPGA-Verilog] mt48lc4m16a2

Description: 模拟micron的sdram的 VHDL 代码，用于验证自己的sdram控制器。-Micron sdram the VHDL simulation of the code used to validate their sdram controller.
Platform: | Size: 9216 | Author: li | Hits:

[VHDL-FPGA-Verilog] FSM

Description: FPGA学习资料，新手入门资料,VERILOG- Micron SDRAM DDR2 Simulation model Verilog
Platform: | Size: 320512 | Author: liu | Hits:

[Software Engineering] byNeyno_

Description: micron data sheet for designing the ddr2 sdram controller part1
Platform: | Size: 16384 | Author: ravi kishore | Hits:

[VHDL-FPGA-Verilog] micron-lpddr-sdram-lpddr_model

Description: modelsim，micron公司的ddr sdram仿真模型，verilog。-modelsim，micron，ddr sdram simulat module，verilog。
Platform: | Size: 40960 | Author: 黄志沛 | Hits:

[Linux-Unix] sdram-micron-mt46h32m32lf-6

Description: SDRC register values for the Micron MT46H32M32LF-6.
Platform: | Size: 1024 | Author: giuwingsing | Hits:

[Linux-Unix] sdram-micron-mt46h32m32lf-6

Description: SDRC register values for the Micron MT46H32M32LF-6.
Platform: | Size: 2048 | Author: kgzgdt | Hits:
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