Search - mimo vhdl

Search - mimo vhdl - List

[matlab] 07126@52RD_Adaptive DL : 0: ldpc码的经典程序,针对ldpc自适应调制的码率变换-ldpc code classical procedures against ldpc adaptive modulation rate of transformation
Update : 2025-02-17 Size : 1kb Publisher : liu
[Software Engineering] project1_report1 DL : 0: The purpose of this project is to explore the issues and implementation of a multiple instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second level cache, and maintain coherence at the L1 cache with a write-invalidate policy. The L2 cache is two-way set associative, with a block size of 8 words, and a total capacity of 512 words.
Update : 2025-02-17 Size : 292kb Publisher : sandeep
[Windows Develop] SPhere_Decoder DL : 0: Sphere Decoder : an m-file to perform sphere decoding
Update : 2025-02-17 Size : 8kb Publisher : Saeed
[matlab] BLAST_QR1 DL : 2: MIMO系统采用QR检测算法的MATLAT仿真程序-mimo qr
Update : 2025-02-17 Size : 1kb Publisher : suideliang
[Other] 61EDA_B79 DL : 0: 书名：LDPC原理与应用。是国内第一本介绍用LDPC编、译码基本原理及应用技术的一本书。对用 vhdl 或verilog实现硬件编程LDPC的人开发无线通信是很好的资料-Title: LDPC Principles and Applications. Is the first book describes using LDPC Encoding and Decoding the basic principles and application of technology, a book. Right to use vhdl or verilog hardware programming LDPC people to achieve development of wireless communications is a very good information
Update : 2025-02-17 Size : 8.02mb Publisher : 邓军
[Post-TeleCom sofeware systems] mimo_dectection DL : 0: mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过-mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on
Update : 2025-02-17 Size : 2.09mb Publisher :
[VHDL-FPGA-Verilog] xc2v_verilog DL : 1: MIMO Simulation VHDL code
Update : 2025-02-17 Size : 79kb Publisher : Anuj
[VHDL-FPGA-Verilog] xc2v_vhdl DL : 0: Verilog Code for MIMO system
Update : 2025-02-17 Size : 95kb Publisher : Anuj
[matlab] 2moreqamcodes DL : 0: the code is about ML detector of mimo technology ,,,,we need of vhdl code for all detectors
Update : 2025-02-17 Size : 5kb Publisher : bhagyalaxmi
[Embeded-SCM Develop] qw174 DL : 0: A one-dimensional transfer matrix method to calculate the phonon crystal structure, MIMO OFDM matlab simulation, For time-frequency analysis algorithm.
Update : 2025-02-17 Size : 58kb Publisher : fanfingsing
[Other] Comparative study of FFA architectures using different multiplier and adder topologies DL : 0: Parallel FIR filter is the prime block of many modern communication application such as MIMO, multi-point transceivers etc. But hardware replication problem of parallel techniques make the system more bulky and costly. Fast FIR algorithm (FFA) gives the best alternative to traditional parallel techniques. In this paper, FFA based FIR structures with different topologies of multiplier and adder are implemented. To optimize design different multiplication technique like add and shift method, Vedic multiplier and booth multiplier are used for computation. Various adders such as carry select adder, carry save adder and Han-Carlson adder are analyzed for improved performance of the FFA structure. The basic objective is to investigate the performance of these designs for the tradeoffs between area, delay and power dissipation. Comparative study is carried out among conventional and different proposed designs. The advantage of presented work is that; based on the constraints, one can select the suitable design for specific application. It also fulfils the literature gap of critical analysis of FPGA implementation of FFA architecture using different multiplier and adder topologies. Xilinx Vivado HLS tool is used to implement the proposed designs in VHDL.
Update : 2021-10-05 Size : 1.07mb Publisher : nalevihtkas