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[Windows Develop] MIPS DL : 0: 《MIPS五级整数流水线模拟系统》设计文档与源代码。 [代码性质] VC完整应用程序代码-The source and design document of <MIPS simulant system of 5 level int pipelining>. [code kind] VC whole application source code.
Update : 2025-02-17 Size : 969kb Publisher : 毛建孟
[CSharp] i2c_32355 code DL : 0: 用于开发mips处理器idt 32355的源代码，测试通过-MIPS processor for the development of 32,355 Employing the source code, the test
Update : 2025-02-17 Size : 5kb Publisher : shqk
[OS Develop] ucos2.8-run-mips DL : 0: UCOS在我的MIPS CPU上的移植 1. 这是UCOS在我的MIPS CPU上的移植代码, 编译工具使用标准的MIPS GCC. 2. 所有CPU相关的代码全在start.S中,相关函数说明如下: -UCOS in my MIPS CPU on one transplant. This is uCOS MIPS CPU in my code the transplant, the compiler uses the standard tools for MIPS GCC.2. All CPU-related code-wide in start.S, the correlation function as follows :
Update : 2025-02-17 Size : 76kb Publisher : 许昕
[MPI] MIPS DL : 0: MIPS处理器的顶层VHDL代码，可综合，可仿真，属硬件描述语言，集成电路设计代码-MIPS processor top-level VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
Update : 2025-02-17 Size : 1kb Publisher : 陈丰
[Linux-Unix] mips_linux DL : 0: mips的移植代码,使用于bootload,可以用,需要改动一定东西-transplant mips code, used in bootload, may need to change certain things
Update : 2025-02-17 Size : 3kb Publisher : rongpeng
[ARM-PowerPC-ColdFire-MIPS] MIPS DL : 1: 带分支预测的MIPS流水线的verilog原代码。详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
Update : 2025-02-17 Size : 17kb Publisher : 张鹤
[ARM-PowerPC-ColdFire-MIPS] sc_mips_core.tar DL : 0: A SystemC MIPS processor model.
Update : 2025-02-17 Size : 1.34mb Publisher : freeta
[VHDL-FPGA-Verilog] vhdl-MIPS DL : 0: Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Update : 2025-02-17 Size : 4.13mb Publisher : ak
[JSP/Java] MIPS DL : 0: 支持MIPS指令集中最基本六条指令的简单的汇编代码到二进制形式-Support the MIPS instruction focused on the most basic 6 of assembly code instructions to a simple binary form
Update : 2025-02-17 Size : 4kb Publisher : Li Zhao
[Embeded-SCM Develop] mrua_SMP8634_2.8.7.0_dev.mips DL : 1: 用于sigma开发的sdk源码，版本为mrua_SMP8634_2.8.7.0。-For the sigma development sdk source code, version mrua_SMP8634_2.8.7.0.
Update : 2025-02-17 Size : 8.97mb Publisher : AD Wang
[assembly language] mips DL : 0: 可在Mips模拟器SPIM上运行的程序代码，加法和排序-SPIM simulator can be run on Mips program code, additions and sorting
Update : 2025-02-17 Size : 1kb Publisher : lab
[VHDL-FPGA-Verilog] F10-Single-Cycle-MIPS DL : 0: This a verilog code of single cycle mips-This is a verilog code of single cycle mips
Update : 2025-02-17 Size : 574kb Publisher : hualin
[Embeded Linux] mips-linux-error DL : 0: mips linux异常中断代码分析.pdf mips linux异常中断代码分析.pdf-mips linux abort code analysis. pdf mips linux abort code analysis. pdf
Update : 2025-02-17 Size : 822kb Publisher : zenggang
[VHDL-FPGA-Verilog] mips DL : 0: mips pipeline code.. copyright material for fr-mips pipeline code.. copyright material for free
Update : 2025-02-17 Size : 8kb Publisher : puneet
[SCM] the-verilog-source-code-of-8051-MCU DL : 0: 8051单片机的源代码,用verilog进行编写，包括测试文件-source code of 8051 MCU
Update : 2025-02-17 Size : 303kb Publisher : 许伟涛
[VHDL-FPGA-Verilog] code DL : 0: this a muti cycle mips code that it can do mutiply,add,sub,xor,beq,bne,slt,sltu,ori,xori and... and it take address and data and then operate on them.-this is a muti cycle mips code that it can do mutiply,add,sub,xor,beq,bne,slt,sltu,ori,xori and... and it take address and data and then operate on them.
Update : 2025-02-17 Size : 5kb Publisher : sajad
[assembly language] MIPS DL : 0: MIPS code that calculate X^2
Update : 2025-02-17 Size : 2kb Publisher : loly
[ELanguage] Minijava-MIPS DL : 0: 一个Minijava编译器，主要实现是先将Minijava翻译成Piglet，再翻译成Spiglet，接着翻译成Kanga，最后翻译成能够在spim模拟器上运行的MIPS代码。-A Minijava compiler, the main achievement is the first Minijava translated into the Piglet then translated into Spiglet, then translated into Kanga, finally translated into MIPS code that can be run on the SPIM simulator.
Update : 2025-02-17 Size : 583kb Publisher : skc
[Other] mips-code-to-machine-code DL : 0: 汇编代码转成机器码——对输入有几点要求：指令是小写；一行只能有一条指令；每行开头不能有空格，必须一上来就是操作符，后面可以有空格；立即数只处理十进制数；输入-1代表程序结束-Turn assembly code into machine code- there are several points of entry requirements: command is lowercase line can only have one instruction beginning of each line can not have spaces, the operator must be up against the back can have spaces immediate treatment only decimal number -1 means the end of the input program
Update : 2025-02-17 Size : 1kb Publisher : WongMan
[VHDL-FPGA-Verilog] mips-cpu-master DL : 0: MIPS Implementation in Verilog. Full source code!
Update : 2025-02-17 Size : 39kb Publisher : loox_dg

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