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Description: 《数字设计和计算机体系结构》一书MIPS verilog源码。
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Size: 3473 |
Author: guo |
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Description: 《数字设计和计算机体系结构》一书MIPS VHDL源码。
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Size: 4738 |
Author: guo |
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Description: 《MIPS五级整数流水线模拟系统》设计文档与源代码。 [代码性质] VC完整应用程序代码-The source and design document of <MIPS simulant system of 5 level int pipelining>.
[code kind] VC whole application source code.
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Size: 992013 |
Author: 毛建孟 |
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Description: 《MIPS五级整数流水线模拟系统》设计文档与源代码。 [代码性质] VC完整应用程序代码-The source and design document of <MIPS simulant system of 5 level int pipelining>.
[code kind] VC whole application source code.
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Size: 992256 |
Author: 毛建孟 |
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Description: 一个完整的MIPS CPU,创新设计,浙江大学某学生作品,有完整的说明文档、仿真文件和测试文件,可以直接综合和仿真。-a complete MIPS CPU, innovative design, a student of Zhejiang University works with complete documentation, simulation and test documents, and can be directly integrated simulation.
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Size: 1866752 |
Author: 梁文锋 |
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Description: Plasma IP Core
你可以利用这个组件在FPGA中设计MIPS结构的CPU
-Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
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Size: 100352 |
Author: xinyang |
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Description: MIPS处理器的顶层VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor top-level VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
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Size: 1024 |
Author: 陈丰 |
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Description: MIPS处理器的数据通道VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor data channel VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
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Size: 1024 |
Author: 陈丰 |
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Description: MIPS处理器的控制verilog代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS control processor Verilog code can be integrated to simulation, a hardware description language, integrated circuit design code
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Size: 1024 |
Author: 陈丰 |
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Description: 《数字设计和计算机体系结构》一书MIPS verilog源码。
Platform: |
Size: 3072 |
Author: guo |
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Description: 《数字设计和计算机体系结构》一书MIPS VHDL源码。
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Size: 4096 |
Author: guo |
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Description: 组成原理大作业--基于MIPS的运算器设计,内附详细设计文档,包含设计文档和使用手册,主程序,测试程序,还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条,用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and user manual, the main program, testing procedures, as well as the design of the diagram and so on. Can be implemented to achieve a basic computing device on the MIPS instruction were related to 17, prepared using Verilog.
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Size: 3060736 |
Author: da |
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Description: 带分支预测的MIPS流水线的verilog原代码。
详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
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Size: 17408 |
Author: 张鹤 |
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Description: Verilog MIPS design.
I found it somewhere on Internet and it is working :-Verilog MIPS design.
I found it somewhere on Internet and it is working :))))
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Size: 18432 |
Author: Asparuh Grigorov |
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Description: 使用verilog設計的MIPS處理器,mips處理機的模擬且可合成驗証-MIPS processor using the verilog design, mips processor synthesis of analog and can be verified
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Size: 4096 |
Author: 張日 |
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Description: single cycle mips design by verilog.
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Size: 18432 |
Author: leejp |
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Description: 北京航空航天大学,计算机组成原理大作业,设计MIP-c处理器-Beijing University of Aeronautics and Astronautics, great work computer organization, design MIP-c processor
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Size: 2360320 |
Author: 623902748 |
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Description: 利用Verilog HDL硬件描述语言实现单周期MIPS_CPU设计。-Design of single-cycle MIPS_CPU
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Size: 958464 |
Author: 金辉 |
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Description: MIPS设计 QuatusII通过,无错误,有仿真波形-MIPS design QuatusII through, no error, there is simulated waveforms
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Size: 6079488 |
Author: 夸克 |
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Description: 单周期的mips处理器设计,用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module
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Size: 117760 |
Author: 王晓强 |
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