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Description: Verilog based simluation model for MXIC SPI Flash.
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Size: 77518 |
Author: ronsullivan |
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Description: system verilog建模说明
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Size: 148809 |
Author: ken_pu |
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Description: Samsung 8G x 8 Bit NAND Flash Memory SPEC and verilog Simulatiom model
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Size: 1328527 |
Author: asd12321 |
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Description: verilog写双端口存储器模型-a Model of Writing Double-Port RAM developed with Verilog
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Size: 1024 |
Author: 杨艳 |
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Description: 用verilog HDL写的操作SRAM的源码-with Verilog HDL write operation SRAM FOSS
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Size: 6144 |
Author: 刘波 |
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Description: 完整的I2C slave model以及spec詳附在內,適合想利用verilog開發此類傳輸的人參考
-integrity of the I2C slave model and spec are attached, want to use Verilog for the development of such transmission of reference
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Size: 226304 |
Author: 李寧 |
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Description: Verilog HDL编写的CPU模型,很经典,比较通用-Verilog HDL prepared by the CPU model, classic, more generic
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Size: 1024 |
Author: wyl |
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Description: the verilog model of sram IS61LV25616AL device.-verilog model of the IS61LV25616AL de sram vice.
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Size: 24576 |
Author: nightyboy |
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Description: iic 总线 verilog 源代码
标准i2c总线, 有sda scl 时钟,频率自定-IIC bus standard Verilog source code i2c bus, has sda scl clock, the frequency of self-
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Size: 2048 |
Author: johnnyz |
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Description: Verilog based simluation model for MXIC SPI Flash.-err
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Size: 77824 |
Author: ronsullivan |
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Description: 可做SD的simulation model-SD can do the simulation model
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Size: 3828736 |
Author: Arthur |
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Description: artera 的一个SDRAM 模型(verilog)-artera an SDRAM model [verilog]
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Size: 4096 |
Author: xiaoheng |
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Description: I2C EEPROM verilog simulation model
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Size: 634880 |
Author: Ravi |
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Description: 美光64GB nand flash 模型 verilog-micron 64GB nand flash verilog module
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Size: 64512 |
Author: cancan |
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Description: 29LV160或8/16位16Mbit的FLASH防真模型,Verilog语言编写-29LV160 or 8/16 anti-FLASH 16Mbit the true model, Verilog language
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Size: 13312 |
Author: 王首浩 |
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Description: Altera的SDR SDRAM模型,verilog实现,带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
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Size: 777216 |
Author: 左左 |
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Description: Verilog Round Robin Arbiter Model
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Size: 1024 |
Author: pippo |
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Description: JPEG的編碼器
使用VERILOG以硬體實現
也使用MODEL模擬驗證-JPEG encoder using the VERILOG hardware implementation is also used to simulate authentication MODEL
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Size: 24576 |
Author: 林曉彬 |
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Description: verilog model for 24xx04
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Size: 7168 |
Author: jwiggams
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Description: 《Verilog HDL入门(第3版)》从语言特点和建模应用两个方面出发,对Verilog语言的基本概念进行了全面深入的讲解,为每一种语言结构提供了大量的例子,并且举例说明了如何使用多种语言结构来构造硬件模型。(Verilog HDL Introduction (Third Edition) "starting from the two aspects of language features and modeling application, the basic concept of Verilog language is a comprehensive and in-depth explanation, provides a number of examples for each language structure, and illustrates how to use a variety of language structure to construct the hardware model.)
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Size: 371712 |
Author: 假假假 |
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