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[Other resource] mt48lc2m32b2

Description: SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
Platform: | Size: 9869 | Author: 洪戈 | Hits:

[Parallel Port] mt48lc2m32b2

Description: the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram - mt48lc2m32b2 d evice.
Platform: | Size: 6802 | Author: nightyboy | Hits:

[VHDL-FPGA-Verilog] mt48lc2m32b2

Description: SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
Platform: | Size: 9216 | Author: 洪戈 | Hits:

[Parallel Port] mt48lc2m32b2

Description: the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram- mt48lc2m32b2 d evice.
Platform: | Size: 6144 | Author: nightyboy | Hits:

[source in ebook] mt48lc4m32b2

Description: mt48lc4m32b2.v 是128M sdram 中典型设计。。可以借鉴。-mt48lc4m32b2.v 128M sdram is typical design. . Be used.
Platform: | Size: 8192 | Author: chenliang | Hits:

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