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[
VHDL-FPGA-Verilog
]
fifo
Description:
用双端口ram实现异步fifo，采用格雷码，避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.
Platform:
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Size:
1024
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Author:
shili
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Search - multiplier_8bits.vhd