Description: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control Platform: |
Size: 6144 |
Author:刘义春 |
Hits:
Description: 用VHDL开发的NANDFLASH的读写程序,给出
NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing Platform: |
Size: 31744 |
Author:mxc |
Hits:
Description: NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array.
To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.-NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array.
To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed. Platform: |
Size: 870400 |
Author:anirudhh |
Hits:
Description: MT的NAND FLASH MT29FxxG08xx系列的Verilog仿真模型,包含详细说明,试验证明,非常准确。-MT of the NAND FLASH MT29FxxG08xx series of Verilog simulation model, contains a detailed description, testing proved very accurate. Platform: |
Size: 92160 |
Author:wuyihua |
Hits:
Description: Altera合作伙伴Eureka Technology.和Cast Inc.为Altera FPGA芯片定制的Nand flash controller IP core-Altera partner Eureka Technology. And the Cast Inc. For the Altera FPGA chip custom Nand flash controller IP core Platform: |
Size: 296960 |
Author:Trevor |
Hits:
Description: 该压缩包包括NAND FLASH(美光)的FPGA控制器的原理及VHDL源码,非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference. Platform: |
Size: 1587200 |
Author:张明利 |
Hits: