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[Other resource] timeforsopcbuider

Description: NIOS II IDE 编程， 定时器测试程序，仅供参考。-NIOS II IDE programming timer testing procedures, for information purposes only.
Platform: | Size: 6278 | Author: 张建 | Hits:

[VHDL-FPGA-Verilog] timeforsopcbuider

Description: NIOS II IDE 编程， 定时器测试程序，仅供参考。-NIOS II IDE programming timer testing procedures, for information purposes only.
Platform: | Size: 399360 | Author: 张建 | Hits:

[Embeded-SCM Develop] ADDAButtonLED

Description: 此源码是利用altera公司的nios II IDE开发的源码，功能是在开发板上实现键盘控制的AD/DA发送接受正弦波、4×4小键盘按键通过串口显示、定时器控制led灯循环点亮的功能。-This source is the use of altera company nios II IDE to develop the source, function is to achieve in the development of on-board keyboard control AD/DA to send accept sine, 4 × 4 keypad buttons show through the serial port, timer control led lights Highlight the function of the cycle.
Platform: | Size: 159744 | Author: zeng xuan | Hits:

[VHDL-FPGA-Verilog] nios

Description: altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
Platform: | Size: 11765760 | Author: chris | Hits:

[VHDL-FPGA-Verilog] Lab2b

Description: A C example for Nios II to use the timer and to obtain the time execution performance
Platform: | Size: 1024 | Author: gios78 | Hits:

[VHDL-FPGA-Verilog] nios-II

Description: 很好地描述了NOISII的串口、定时中断等各种实例-A good description of the NOISII the serial port, timer interrupt, and other examples of
Platform: | Size: 204800 | Author: 李大伟 | Hits:

[VHDL-FPGA-Verilog] Profiling_Nios_II_Systems

Description: Altera公司原版设计手册，nios ii ide profiling模式使用。-This application note describes a variety of ways to measure the performance of a Nios® II system with three tools: the GNU profiler, called nios2-elf-gprof, the timestamp interval timer component, and the performance counter component. Two tutorials give detailed examples of using these tools to measure performance in the Altera® Nios II Software Build Tools (SBT) development flow.
Platform: | Size: 269312 | Author: Han Yunbo | Hits:

[VHDL-FPGA-Verilog] timer

Description: nios ii中时钟的测试程序。。求成全-something about timer
Platform: | Size: 11670528 | Author: hq | Hits:

[VHDL-FPGA-Verilog] NIOS_SMG_LED_TIMER

Description: FPGA中的定时器，数码管，显示。nios ii中的一个简单例程，简单-The paper describes the FPGA timer, digital tube, display. Nios ii of a simple routines, simple
Platform: | Size: 5184512 | Author: 战天 | Hits:

[SCM] timer0

Description: 基于Nios II实现基本的定时器功能。-The timer is based on Nios II for numbering.
Platform: | Size: 11104256 | Author: super | Hits:

[VHDL-FPGA-Verilog] nios-II

Description: NiosII范例，包括了DMA控制，串口通信，定时器中断，以及NIOS的部分范例，对于FPGA内核的开发很有帮助。-NiosII example, including the DMA control, serial communication, timer interrupt, as well as some examples of NIOS, development will be helpful for the FPGA core.
Platform: | Size: 204800 | Author: 张奎 | Hits:

[SCM] nios_ii-irq

Description: ALTERA FPGA 构建nios ii CPU ——中断法定时器 本例子教你学会FPGA NIOS中断，熟悉中断，逐步深入。-ALTERA FPGA build nios ii CPU- to interrupt method timer this example teach you to learn to FPGA NIOS interrupt, familiar interrupt gradually deepened.
Platform: | Size: 1024 | Author: 肖建 | Hits:

[ARM-PowerPC-ColdFire-MIPS] timer

Description: 基于FPGA nios II 的软核处理器 定时器的应用程序-Based on FPGA nios II soft-core processor timer application
Platform: | Size: 1024 | Author: chen | Hits:

[VHDL-FPGA-Verilog] test6_timer

Description: 这是有Quartus II和Nios II共同协作完成的基于FPGA的异步电机矢量控制系统，里面包含定时器，LCD显示，温度检测等内容-This is the Quartus II and Nios II work together to complete induction motor vector control system based on FPGA, contains a timer, LCD display, temperature detection, etc
Platform: | Size: 19980288 | Author: hurongxueyue | Hits:

[Other] The-NIOSII-detailed-tutorial

Description: 黑金动力原创nios ii教程，介绍了硬件、软件开发流程，提供了led、中断、串口、rtc、spi、iic、定时器等十多个实验的详细介绍-Alinx original nios ii tutorial, this paper introduces the hardware and software development process, and provides led, interrupt, a serial port, the RTC, spi, iic, timer and so on more than a dozen experiments in detail
Platform: | Size: 5949440 | Author: 李帅 | Hits:

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