Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - nios sdram

Search list

[Embeded-SCM Develop] SDRAM

Description: SDRAM Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 1572577 | Author: 李大同 | Hits:

[Speech/Voice recognition/combine] SD_Card

Description: NIOS环境下的SD—CARD读写，模块-NIOS environment SD-CARD literacy, modules
Platform: | Size: 2048 | Author: 张 | Hits:

[Embeded-SCM Develop] SDRAM

Description: SDRAM Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 1571840 | Author: 李大同 | Hits:

[Embeded-SCM Develop] SDRAM_phase_position.RAR

Description: FPGA的Nios配合时如何计算SDRAM相位的文章-FPGA co-ordination of the Nios how to calculate the phase-SDRAM article
Platform: | Size: 110592 | Author: chen | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_SRAM_PIC_DISPLAY

Description: NIOS下，将图片显示到液晶屏上去，基于DE2板子的，全硬件实现，现将图片烧到SDRAM，然后可以直接显示到液晶屏。
Platform: | Size: 1234944 | Author: 刘赛 | Hits:

[ARM-PowerPC-ColdFire-MIPS] nios_ram

Description: nios 中读写sdram的程序，适用于epc2 cyclone二代FPGA板子-Nios SDRAM read and write the procedures applicable to epc2 cyclone II FPGA board
Platform: | Size: 481280 | Author: 肖文 | Hits:

[Embeded-SCM Develop] ddr_ddr2_sdram

Description: 基于NIOS II的ddr2控制器,配有详细的文档,经验证后可使用.-NIOS II based on the DDR2 controller, equipped with detailed documentation, the experience can be used after certification.
Platform: | Size: 3486720 | Author: Jackie | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[Linux-Unix] first_cpu

Description: nios ii cpu核，包含通用IO口、sdram、flash、uart-nios ii cpu、genernal io port、sdram、falsh、uart
Platform: | Size: 13319168 | Author: 陆yong | Hits:

[VHDL-FPGA-Verilog] sdramled

Description: alter FPGA，包含sdram的nios系统开发实验完整工程文件-nios develop based nios IDE6.0，system involved an sdram
Platform: | Size: 1414144 | Author: 吴波 | Hits:

[Embeded-SCM Develop] hello_world_sgdma

Description: NIOS II下调试通过的scatter-gather DMA从SDRAM 到 片内RAM的C代码-NIOS II debugging adopted under the scatter-gather DMA from SDRAM to the chip RAM of the C code
Platform: | Size: 272384 | Author: tansuohao | Hits:

[VHDL-FPGA-Verilog] DE2_70_D5M_LTM_NIOS_capture

Description: 本文提供一個CMOS Controller，讓Nios II可以藉由CMOS Controller控制CMOS，並能讀出CMOS放在SDRAM中的影像。运行在DE2-70平台上-This article provides a CMOS Controller, so that Nios II can take advantage of CMOS Controller control CMOS, and allowed to deliver on the SDRAM in the CMOS image. Run on DE2-70 platform
Platform: | Size: 1633280 | Author: 彭天 | Hits:

[Other] udp_pack

Description: Nios II打包程序，通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM，再用UDP打包进行以太网传输-Nios II pack
Platform: | Size: 2048 | Author: 詹士波 | Hits:

[Other] udp_pack_nios

Description: Nios II打包程序，通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM，再用UDP打包进行以太网传输-Nios II pack
Platform: | Size: 2048 | Author: 詹士波 | Hits:

[Software Engineering] SDRAM

Description: 连接Nios II 和SDRAM的系统设计，DDR SDRAM设计及调试经验总结，MT48LC16M16资料。-failed to translate
Platform: | Size: 1903616 | Author: luyi | Hits:

[uCOS] helloucos

Description: nios的hello world代码，基于ucos和nios sdram存储-nios in the hello world code, based on ucos and nios sdram memory
Platform: | Size: 215040 | Author: 电子迷 | Hits:

[VHDL-FPGA-Verilog] UART_DMA

Description: 基于DE1的nios的串口sdram通信例程-Based on DE1' s nios serial communication routines sdram
Platform: | Size: 11353088 | Author: 李 | Hits:

[VHDL-FPGA-Verilog] nios

Description: 利用NIOS做的基于DE2的软核，包含锁相环，SDRAM等基本模块，可以运行基本程序-The soft-core NIOS to do based on the DE2, including PLL, SDRAM modules, you can run the basic program
Platform: | Size: 15776768 | Author: judeliu | Hits:

[VHDL-FPGA-Verilog] Nios_SDRAM

Description: 在Nios上搭建平台，使用SDRAM作内存，并用VGA显示图像-A platform on the Nios SDRAM for memory, and VGA display image
Platform: | Size: 16686080 | Author: 彭娟娟 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 在nios环境下，结合verilog语言开发，功能是往SDRAM里面写0-99并打印出来-Nios environment, combined with the verilog language development function is to write to the SDRAM inside 0-99 and print out
Platform: | Size: 16943104 | Author: zq | Hits:
« 12 3 4 5 6 7 8 9 10 ... 18 »

CodeBus www.codebus.net