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[Other resource] SPI接口音频Codec实验

Description: ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder
Platform: | Size: 34889 | Author: xf | Hits:

[Embeded-SCM Develop] adda_spi

Description: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE - based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Platform: | Size: 67089 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] three_wave

Description: 此源码是利用altera公司的NIOS II IDE开发的，功能是通过spi 核控制AD/DA发三角波-this source is the use of altera NIOS II IDE. function through spi nuclear control AD / DA fat triangular wave
Platform: | Size: 67507 | Author: zeng xuan | Hits:

[Other] 基于Nios II的SPI总线设计

Description: 在FPGA下建立NiosII内核，并在该基础上设计SPI总线
Platform: | Size: 13497390 | Author: fengruozhuo | Hits:

[VHDL-FPGA-Verilog] SPI接口音频Codec实验

Description: ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder
Platform: | Size: 34816 | Author: xf | Hits:

[Embeded-SCM Develop] adda_spi

Description: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE- based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Platform: | Size: 66560 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] three_wave

Description: 此源码是利用altera公司的NIOS II IDE开发的，功能是通过spi 核控制AD/DA发三角波-this source is the use of altera NIOS II IDE. function through spi nuclear control AD/DA fat triangular wave
Platform: | Size: 67584 | Author: zeng xuan | Hits:

[ARM-PowerPC-ColdFire-MIPS] SDCard_test

Description: SD卡的SPI驱动程序，已在Nios2 IDE 中调试成功-SD card SPI driver, has been successful Nios2 IDE in debug
Platform: | Size: 24576 | Author: jzt | Hits:

[Embeded Linux] neek_alternate_sd_card_controller

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 2167808 | Author: zhangdongqing | Hits:

[VHDL-FPGA-Verilog] hex2rom_0241_Win32

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 96256 | Author: zhangdongqing | Hits:

[VHDL-FPGA-Verilog] MTDB_SYSTEM_CD_V1.0

Description: ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesizer,使用FPGA来做电子琴，要用FPGA来做合成器的看这个。 国内部分地区的网络对TERASIC封杀，原因不明，这个包是使用代理下载的，非常不容易。-ALTERA Nios II Embedded Evaluation Kit development board manufacturers (terasic) to provide multi-media display boards (Terasic Multimedia Touch Panel Daughter Board (MTDB)) the expansion of the development package. Where for example there are two open source 1.MTDB_SD_Card_Audio, from the SD card and then read the WAV file to play through the DA, the SD Card for the beginner is not very useful, we can see that the use of FPGA SPI read and write to SD CARD. 2.MTDB_Systhesizer, the use of FPGA as organ, synthesizer use FPGA to do the look at this. Internal parts of the network to block TERASIC for reasons unknown, the package is downloaded using a proxy, is not easy.
Platform: | Size: 27464704 | Author: myfingerhurt | Hits:

[VHDL-FPGA-Verilog] analogue-digi-ana-converter

Description: design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an analogue an analogue input using SPI MCP3202 12-Bit A/D converter to generate the digital data stream and then the digital data will be used to generate an analogue output using Analog Devices 8-bit SPI AD7303 D/A converter.
Platform: | Size: 1398784 | Author: ak | Hits:

[VHDL-FPGA-Verilog] Nios_II_SPI

Description: 本源码为Nios II的开发示例,主要演示Nios II的SPI总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II design of the SPI bus. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
Platform: | Size: 16035840 | Author: huangshengqun | Hits:

[VHDL-FPGA-Verilog] SPI

Description: design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.-design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.
Platform: | Size: 1024 | Author: weichenghao | Hits:

[VHDL-FPGA-Verilog] NIOS2-enbeded-SPI-controller

Description: FPGA设计中利用NIOS开发软核 此文件让您熟悉NIOS软件架构-Development of FPGA design using NIOS soft core NIOS this file so that you are familiar with the SPI controller integrated software
Platform: | Size: 323584 | Author: ice | Hits:

[VHDL-FPGA-Verilog] DS1302_NIOSII

Description: nios ii 软核的ds1302（模拟spi接口）总线驱动函数及函数声明-nios ii soft ds1302（spi） bus driver functions and function declaration
Platform: | Size: 2048 | Author: 刘全义 | Hits:

[VHDL-FPGA-Verilog] altera_avalon_spi

Description: Altera NIOS II SPI 驱动-Altera NIOS II uart DRIVER
Platform: | Size: 7168 | Author: zy | Hits:

[VHDL-FPGA-Verilog] nios.ii

Description: NIOSII开发例程源码包括spi，dma，PIO等-NIOSII development routine source code, including SPI, DMA, PIO, etc.
Platform: | Size: 13997056 | Author: kmtian | Hits:

[Other] USB-UART-SPI-I2C-IO-ADC-PWM

Description: uc/os operation system,which is used in FPGA nios ii.
Platform: | Size: 17695744 | Author: niukang | Hits:

[VHDL-FPGA-Verilog] NIOS interface with SD card SPI

Description: So, the project is attached. Implemented NIOS2 processor on SOPC Quartus 11.1, uses SDRAM (on chip project in this version does not fit) SPI interface is used for communication between Nios and SD card (3 fpga outputs, one fpga input) Accordingly, it opens the message.txt file on the SD card and outputs its contents to the console, creates a file, fills it in, gives a list of files in the root.
Platform: | Size: 157645 | Author: hemamont@mail.ru | Hits:
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