Description: LDPC编码的研究与硬件实现 是关于LDPC码的一篇很好的文章-LDPC coding research and hardware implementation of LDPC codes on a very good article Platform: |
Size: 4176896 |
Author:韩杨 |
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Description: full design for the 2x2 MIMO on FPGA, very amazing pdf to give the design for the block of the 2x2 mimo using the alamouti coding. Platform: |
Size: 967680 |
Author:Xan |
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Description: 中文摘要
正交频分复用( OFDM , Orthogonal Frequency Division
Multiplexing)是当前一种非常热门的通信技术。它即可以被看作是一种
调制技术,也可以被看作是一种复用技术。由于它具有抗多径衰落和频谱
利用率高的特点,因此被广泛应用于高速数字通信领域,比如应用于IEEE
802.11a无线局域网(WLAN)的物理层等等。
我的毕业设计的核心任务是:采用 FPGA 来实现一个基于OFDM 技术
的通信系统中的基带数据处理部分,即调制解调器。其中发射部分的调制
器包括:信道编码(Reed-Solomon 编码),交织,星座映射,FFT和插
入循环前缀等模块。我另外制作了相应的解调器,可以实现上述功能的逆
变换。
另外,我还对OFDM技术, IEEE 802.11a的标准文献,基于Simulink
的 OFDM 模型和仿真,ALTERA 公司的技术和 IP Core 的使用等方面进
行了研究。这些在文章中都有体现。
-Abstract
Orthogonal frequency division multiplexing (OFDM, Orthogonal the Frequency Division,
Multiplexing) is a very popular communication technology. It can be seen as a
Modulation technique can also be seen as a multiplexing technique. Because of its resistance to multipath fading and spectrum
High utilization characteristics, and is widely used in high-speed digital communications, such as used in IEEE
802.11a wireless LAN (WLAN) physical layer.
The core mission of my graduation project: FPGA to implement a technology based on OFDM
Communication systems in baseband data processing part, ie the modem. These emission part of the modulation
Includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and interpolation
Into the cyclic prefix modules. I also produced a corresponding demodulator can achieve the inverse of the above functions
Transformation.
In addition, OFDM technology, the IEEE 802.11a standard literature, based on Simulink
Platform: |
Size: 1553408 |
Author:万利 |
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Description: 采用FPGA 来实现一个基于OFDM 技术
的通信系统中的基带数据处理部分,即调制解调器。其中发射部分的调制
器包括:信道编码(Reed-Solomon 编码),交织,星座映射,FFT 和插
入循环前缀等模块。-FPGA to implement a baseband data based on OFDM technology in the communication system processing section, namely modem. Transmitter modulator includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and insert the cyclic prefix modules. Platform: |
Size: 1553408 |
Author:pipi_dog |
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Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R . Platform: |
Size: 11264 |
Author:mezo |
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Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R . Platform: |
Size: 11264 |
Author:mezo |
Hits:
Description: Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ .-Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ . Platform: |
Size: 2099200 |
Author:mezo |
Hits: