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[VHDL-FPGA-Verilog] pll DL : 1: 用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.
Update : 2025-02-17 Size : 109kb Publisher : 孙犁
[ARM-PowerPC-ColdFire-MIPS] TEA5767-PLL DL : 0: TEA5767-PLL收音机整套方案（汇编源码）-TEA5767- PLL radio package (compiled source code)
Update : 2025-02-17 Size : 156kb Publisher :
[Communication-Mobile] DDS+PLL DL : 0: 基于FPGA的新的DDS+PLL时钟发生器-FPGA-based new DDS PLL clock generator
Update : 2025-02-17 Size : 142kb Publisher : 李敏
[Communication-Mobile] pll DL : 0: 关于锁相环的MATLAB的仿真程序，其中有详细的注释，希望它能能对你的能有所帮助-PLL on the MATLAB simulation program, including a detailed Notes hope it can be your right, can be helped
Update : 2025-02-17 Size : 2kb Publisher : sun
[Communication-Mobile] pll DL : 0: matlab在电力电子技术仿真中运用，包括PLL的具体仿真实现，一些滤波算法的实现，很有用-matlab simulation in power electronic technology to use, including the specific PLL simulation, a number of filtering algorithms to achieve useful
Update : 2025-02-17 Size : 1.26mb Publisher : xulin
[matlab] pll DL : 0: 仿真了锁相环工作到一定时间后达到锁定状态的过程，程序采用的是一阶RC低通滤波器即二阶一型环-Simulation of the PLL to work until after a certain period of time to achieve lock-state process, the procedure is used first-order RC low-pass filter that is second-order one-ring
Update : 2025-02-17 Size : 1kb Publisher : ZHangdaojie
[VHDL-FPGA-Verilog] pll DL : 0: fpga中pll时钟实现的源代码，可实现倍频或分频-pll clock in the FPGA to achieve the source code, can be realized or sub-octave frequency
Update : 2025-02-17 Size : 3kb Publisher : 张恒
[ARM-PowerPC-ColdFire-MIPS] PLL DL : 0: DP256_HCS12_PLL锁相环驱动程序-DP256_HCS12_PLL PLL Driver
Update : 2025-02-17 Size : 470kb Publisher : 王鹏伟
[Software Engineering] A.spur-free.fractional-N.pll DL : 0: A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
Update : 2025-02-17 Size : 231kb Publisher : 谢振
[matlab] Matlab-pll DL : 0: 附件里的代码，里面有详细过程说明： Phasell.m pll.m -Annex of the code, there are detailed process description: Phasell.mpll.m
Update : 2025-02-17 Size : 7kb Publisher : mzb
[Embeded-SCM Develop] PLL DL : 0: 关于在FPGA或CPLD锁相环PLL原理与应用,介绍用FPGA的分频技术.-FPGA or CPLD on the Theory and Application of phase-locked loop PLL, introduce sub-band using FPGA technology.
Update : 2025-02-17 Size : 92kb Publisher : yjc
[DSP program] PLL DL : 0: pll算法是来自经典的DSP的C程序和汇编程序库-pll algorithm is from the classic DSP procedures and compilation of the C library
Update : 2025-02-17 Size : 125kb Publisher :
[matlab] pll-linear DL : 0: 该程序描述了二阶锁相环的环路滤波器的设计和线性模型分析-The program describes the second-order PLL loop filter design and linear model analysis
Update : 2025-02-17 Size : 1kb Publisher : vie
[VHDL-FPGA-Verilog] PLL DL : 0: PLL 时钟模块　　Quartus II平台的简单设计实例　附仿真波形-PLL clock module Quartus II platform attached to a simple design example simulation waveforms
Update : 2025-02-17 Size : 788kb Publisher : 许东滨
[Communication-Mobile] PLL DL : 0: 锁相环控制，用的IC是AT89C2051，用P1口做控制，不知大家有没兴趣-PLL control IC is used AT89C2051, using P1 control I do, I do not know you have no interest
Update : 2025-02-17 Size : 2kb Publisher : sumiao
[Software Engineering] PLL DL : 0: 国外一篇很好的数字锁相环（PLL）设计文档（解压后PLL.pdf），不可不看呦！-Abroad, a good digital phase-locked loop (PLL) design documents (after extracting PLL.pdf), can not look at Yo!
Update : 2025-02-17 Size : 344kb Publisher :
[Special Effects] pll DL : 0: 介绍一个小的进行锁相环PLL仿真的信号预处理程序-Introduced to carry out a small simulation of phase-locked loop PLL signal pre-processing procedures
Update : 2025-02-17 Size : 1kb Publisher : 刘静
[DSP program] PLL DL : 0: 可以实现自动锁相环功能的C源程序代码模块，-Can be achieved automatically PLL function C source code modules,
Update : 2025-02-17 Size : 6kb Publisher : 刘磊
[VHDL-FPGA-Verilog] PLL DL : 0: verilog PLL的代码，和PLL 的功能介绍，希望能通过，只是简单了点-verilog PLL code, and the function of PLL, the hope, but simply a point
Update : 2025-02-17 Size : 18kb Publisher : gjj
[Communication-Mobile] pll DL : 0: 关于数字锁相环方面的代码,觉得还可以，或许对大家有用-the code of the pll
Update : 2025-02-17 Size : 2kb Publisher : joe

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