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[Other resource] PCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.
Platform: | Size: 899078 | Author: lee | Hits:

[Embeded-SCM Develop] pci_uart_parity

Description: uart pci 等verilog hdl 代码
Platform: | Size: 7534 | Author: skdk | Hits:

[VHDL-FPGA-Verilog] pci 的vhdl 源代码

Description: pci 的vhdl 源代码-The source code of PCI VHDL.
Platform: | Size: 3072 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] PCI_target

Description: VHDL编写的PCI代码,PCI2.2兼容,Xillinx Virtex与Spantan II 优化,33M主频,32位宽度,全目标功能等.-prepared by the PCI VHDL code, PCI2.2 compatible Xillinx Virtex II and Spantan optimized route speed, 32-bit width, the whole objective functions.
Platform: | Size: 844800 | Author: citybus | Hits:

[ELanguage] usb_funct

Description: USB接口的VHDL源码，支持Verilog HDL程序-USB VHDL source code, supports Verilog HDL procedures
Platform: | Size: 230400 | Author: 王森 | Hits:

[Embeded-SCM Develop] fpgapci

Description: 用vhdl编写的pci源代码。花了我2000多元钱买来的，编译通过！-with vhdl pci prepared by the source code. I spent more than 2,000 yuan to buy and compile!
Platform: | Size: 3072 | Author: 王娟 | Hits:

[VHDL-FPGA-Verilog] PCI_VHDL

Description: 32位33M的PCI接口的VHDL实现，想深入学VHDL或实现PCI的可以看一看-32 of the PCI interface 33M realize VHDL, VHDL, or would like to realize in depth study could take a look at the PCI
Platform: | Size: 106496 | Author: 缪德芳 | Hits:

[Other] PCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Platform: | Size: 899072 | Author: lee | Hits:

[Embeded-SCM Develop] pci_uart_parity

Description: uart pci 等verilog hdl 代码-uart pci such as verilog hdl code
Platform: | Size: 7168 | Author: skdk | Hits:

[Embeded-SCM Develop] state_machine

Description: 基于pci的verolog hdl 状态机描述-Pci of verolog hdl-based state machine description
Platform: | Size: 3072 | Author: 小新 | Hits:

[VHDL-FPGA-Verilog] 10pci_host

Description: 基于Verilog Hdl的PCI控制代码-Verilog Hdl the PCI-based control code
Platform: | Size: 207872 | Author: wxd | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA应用开发入门与典型实例 代码 FPGA（现场可编程逻辑器件）以其体积小、功耗低、稳定性高等优点被广泛应用于各类电子产品的设计中。本书全面讲解了FPGA系统设计的背景知识、硬件电路设计，硬件描述语言Verilog HDL的基本语法和常用语句，FPGA的开发工具软件的使用，基于FPGA的软核嵌入式系统，FPGA设计的基本原则、技巧、IP核， FPGA在接口设计领域的典型应用，FPGA＋DSP的系统设计与调试，以及数字变焦系统和PCI数据采集系统这两个完整的系统设计案例。 -FPGA Application Development and Typical examples of code for FPGA (field programmable logic device) for its small size, low power consumption, high stability, the advantages are widely used in the design of electronic products. This book comprehensively explained the background FPGA system design, hardware design, hardware description language Verilog HDL syntax and basic common statement, FPGA use of the software development tools, FPGA-based soft-core embedded systems, FPGA design of the basic principles , skills, IP core, FPGA interface design field in a typical application, FPGA+ DSP system design and debug, and digital zoom systems and PCI data acquisition system design of two cases of complete system.
Platform: | Size: 10980352 | Author: 海到无涯 | Hits:

[Embeded-SCM Develop] pci_uart_parity

Description: uart pci 等verilog hdl 代码-uart pci such as verilog hdl code
Platform: | Size: 7168 | Author: nddiffi | Hits:

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