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Description: 一本介绍pll的书籍，讲了它的原理，几个重要的指标参数以及几种结构种类。-pll a briefing books, it stresses the principle, a number of important parameters and the structure of several types.
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Size: 1129579 |
Author: 施耀华 |
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Description: A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
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Size: 236523 |
Author: 谢振 |
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Description: 一本介绍pll的书籍，讲了它的原理，几个重要的指标参数以及几种结构种类。-pll a briefing books, it stresses the principle, a number of important parameters and the structure of several types.
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Size: 1129472 |
Author: 施耀华 |
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Description: 直接式数字锁相环频率合成器.用ELANIX公司SYSTEMVIEW运行.-direct digital PLL frequency synthesizer. SYSTEMVIEW ELANIX companies with operations.
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Size: 1024 |
Author: a |
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Description: 锁相与频率合成技术，庄卉等编著。讲述模拟和数字锁相环及频率合成器的理论、组成、测试和设计。-PLL frequency synthesizer with the technology, such as Zhuang Hui edited. On analog and digital PLL frequency synthesizer and the theory, composition, testing and design.
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Size: 6793216 |
Author: Zhou |
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Description: 无线传送,DDS PLL 在频率合成中的应用,经典文章.-wireless transmission, DDS PLL frequency synthesizer in the application of classic articles.
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Size: 89088 |
Author: king |
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Description: 基于MC145159的PLL频率合成器设计与实现
介绍了锁相环路频率合成器的基本原理,分析了集成锁相环芯片M C 145159的工作特性,给出了集成锁相环芯片M C 145159的一个应用实例,为高频频率合成器的设计提供了一个较好的思路.测试结果证明了设计的合理性与实用性,系统频率稳定度优于10-7.-MC145159 PLL frequency synthesizer design and realization of PLL frequency synthesizer the basic principles of integrated PLL chip M C 145159 work characteristics, Integration is the PLL chip M C 145159 example of an application, for High Frequency Synthesizer Design provided a good idea. The test results proved the rationality of design and practicality. the system frequency stability is better than 10-7.
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Size: 192512 |
Author: liming |
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Description: AV系统数字调谐PLL频率合成器的单片机控制
文章利用LC7218PLL频率合成器在AV领域的电调谐功能,提出了一个TV/FM/AM全景接收机设计方案,重点设计分析了LC7218与单片机之间的I/O数据结构,显示了它优良的性能。-AV system PLL digital tuning of the single-chip frequency synthesizer to control the use of article LC7218PLL frequency synthesizer in the AV field of electrical tuning function, a TV/FM/AM panoramic receiver design programs that focus on design and analysis of the LC7218 and MCU between the I/O data structure, demonstrated its excellent performance.
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Size: 96256 |
Author: love2008 |
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Description: A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
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Size: 236544 |
Author: 谢振 |
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Description: MIT的一个数字频综源代码，包括cadence的，CPPSIM（MIT做的PLL的设计软件）-MIT, a digital frequency synthesizer source code, including the cadence of, CPPSIM (MIT make the PLL design software)
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Size: 27648 |
Author: hqh |
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Description: PIC单片机控制PLL频率合成器MC145170应用源码．-PIC Single-chip PLL frequency synthesizer control MC145170 application source code.
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Size: 2048 |
Author: lvnianzhi |
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Description: MB1504锁相环芯片的51单片机驱动程序,可以根据需要修改合适的分频值来完成频率合成配置.-MB1504 PLL chip 51 Single-chip driver, need to be amended in accordance with the appropriate value of the sub-band frequency synthesizer to complete the configuration.
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Size: 10240 |
Author: 魏广寅 |
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Description: 小数分频技术解决了锁相环频率合成器中的频率分辨率和转换时间的矛盾, 但是却引入了严重的相位噪声,
传统的相位补偿方法由于对Aö D 等数字器件的要求很高并具有滞后性实现难度较大。$2 调制器对噪声具有整形的功
能, 因而将多阶的$2 调制器用于小数分频合成器中可以很好地解决他的相位噪声的问题, 大大促进了小数分频技术的
发展和应用。文章最后给出了在GHz 量级上实现的这种新型小数分频合成器的应用电路, 并测得良好的相噪性能。-Fractional-N technology to solve the PLL frequency synthesizer in the frequency resolution and conversion time of contradictions, but the introduction of a serious phase noise, the traditional method of phase compensation A? D because of the number of devices, such as demanding and have the lag is more difficult to achieve. $ 2 modulator with noise shaping function, and thus will be more than the $ 2-order modulator for fractional-N synthesizer can be a good solution to his problem of phase noise, contributed significantly to the fractional-N technology development and applications. Finally, the article in the GHz order to achieve this new fractional-N synthesizer of the application circuit, and measured a good phase noise performance.
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Size: 286720 |
Author: 朱成发 |
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Description: 数字鉴相器,数字锁相环频率合成系统FPGA的实现,很有借鉴价值-Digital phase detector, digital PLL frequency synthesizer system FPGA realization of referential value
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Size: 53248 |
Author: 颜小山 |
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Description: 摘要：应用CXA1019S芯片完成接收机混频、中放、解调等的设计，并用芯片BU2614以PLL
频率合成的方法产生稳定的本振和控制输入调谐回路的谐振频率，从而实现电调谐。单片机采用
MCS-51系列对频率合成器BU2614进行控制，加上键盘、显示和存储器电路，可实现多种程控搜
索、电台存储等功能。-Abstract: The complete receiver chip CXA1019S mixer, amplifier, demodulator, such as design, and BU2614 chip PLL frequency synthesizer to generate a stable method of vibration and control input of the tuner circuit resonant frequency, in order to achieve electrical tuning. Singlechip using MCS-51 series of the frequency synthesizer BU2614 control, together with the keyboard, display and memory circuits, can achieve a variety of program-controlled search, radio storage functions.
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Size: 173056 |
Author: 谢运军 |
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Description: 书籍频综和锁相环的Matlab源代码，对频综和锁相环的设计很有帮助；-Books PLL Frequency Synthesizer and the Matlab source code for PLL Frequency Synthesizer Design and helpful
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Size: 499712 |
Author: wujianfeng |
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Description: 发射部分采用锁相环式频率合成器技术， MC145152和MC12022芯片组成锁相环，将载波频率精确锁定在35MHz，输出载波的稳定度达到4×10-5，准确度达到3×10-5，由变容二极管V149和集成压控振荡器芯片MC1648实现对载波的调频调制；末级功放选用三极管2SC1970，使其工作在丙类放大状态，提高了放大器的效率，输出功率达到设计要求。-Part of the launch phase-locked loop frequency synthesizer using technology, MC145152 and MC12022 PLL chips to lock in the exact carrier frequency 35MHz, the output carrier to achieve the stability of 4 × 10-5, reaching the accuracy of 3 × 10-5 by the varactor diode V149 and integration to achieve MC1648 chip VCO FM modulation on the carrier selection transistor amplifier at the end of class 2SC1970, to work in the C state to enlarge and improve the efficiency of the amplifier output power to meet the design requirements.
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Size: 2048 |
Author: 李伟 |
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Description: 介绍了ADF4360-8芯片的功能、内部结构、引脚排列及典型的应用电路及其评估板。ADF4360-8是集成的整数N合成器和压控振荡器（VCO）。芯片内嵌一个基准输入部分、N计数器和R计数器、相位频率检波器（PFD）和充电泵、多路复用器和锁定检波器、输入移位寄存器、控制锁存器、N计数锁存器、R计数锁存器。它可用于产生系统时钟，作为测试设备，用于无线局域网（LAN），作为闭路电视（CATV）设备。ADF4360-8EB1评估板可以让用户评估ADF4360-8频率合成器PLL的性能。
-Introduced the ADF4360-8-chip features, the internal structure of a typical pin and the application circuit and its evaluation board. ADF4360-8 is an integrated integer N synthesizer and voltage controlled oscillator (VCO). Input chip embedded part of a benchmark, N and R counters counter, phase frequency detector (PFD) and charge pump, and lock multiplexer detector, input shift register, control latch, N counter latch , R latch count. It can be used to generate system clock, as a test equipment for wireless local area network (LAN), as a closed-circuit television (CATV) equipment. ADF4360-8EB1 evaluation board allows users to assess the ADF4360-8 Synthesizer PLL performance.
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Size: 400384 |
Author: 庄乾章 |
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Description: A 10μs Fast Switching PLL Synthesizer for a GSM/EDGE Base-Station.介绍快速跳频锁相环的非常好的一篇文章！-A 10μs Fast Switching PLL Synthesizer for a GSM/EDGE Base-Station.A very good article on the fast frequency hopping phase-locked loop is introduced!
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Size: 169984 |
Author: meng |
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Description: Phase Locked Loop (PLL) Synthesizer and Translation Loop ADI's industry leading phase locked loop (PLL) synthesizer family features a wide variety of high performance, low jitter clock generation and distribution
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Size: 9374 |
Author: hallak_aymen@yahoo.comhallak_aymen@yahoo.com |
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