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[
VHDL-FPGA-Verilog
]
pn
Description:
用Verilog语言生成7位的小m序列，产生pn码-Verilog language used to generate seven small m sequence code generated pn
Platform:
|
Size:
2048
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Author:
楚鹤
|
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Search - pn sequence generating code in vhdl