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[VHDL-FPGA-Verilog] pingpongjiegou

Description: VHDL编译,本程序是从USB GPIF口SRAM传输数据,且形成乒乓结构传输-VHDL compiler, the procedure is GPIF USB port SRAM transmission of data, Structure formation and transmission Table Tennis
Platform: | Size: 2048 | Author: nicai | Hits:

[VHDL-FPGA-Verilog] 128×16ram

Description: VHDL程序设计的RAM存储器，双端口，128×16比特-VHDL programming RAM memory, dual-port, 128 × 16 bits
Platform: | Size: 1024 | Author: petri | Hits:

[VHDL-FPGA-Verilog] pingpong

Description:
Platform: | Size: 75776 | Author: 王力 | Hits:

[VHDL-FPGA-Verilog] pingpang

Description: 实现乒乓缓存，用verilog语言编写！-Realize cache ping-pong, using Verilog language!
Platform: | Size: 165888 | Author: zhl | Hits:

[VHDL-FPGA-Verilog] SRAM-PINGPANG

Description: 超声视频图像需要实时地采集并在处理后在显示器上重建，图像存储器就必须不断地写入数据，同时又要不断地从存储器读出数据送往后端处理和显示[11]。为了满足这种要求，可以在采集系统中设置2片容量一样的SRAM，通过乒乓读写机制来管理。任何时刻，只能有1片SRAM处于写状态，同时也只有1片SRAM处于读状态。工作期间，2片SRAM都处于读写状态轮流转换的过程，转换的过程相同，但是状态错开，从而保证数据能连续地写人和读出祯存.-Real-time ultrasound video images need to collect and deal with the reconstruction after the display, image memory must be continually write data, while at the same time continuously sent from the memory读出数据back-end processing and display [11]. To meet this requirement, you can set up collection system capacity of two different SRAM, read and write through the ping-pong mechanisms to manage. At any time, can only have a SRAM in write state, but also the only one at a time the state of SRAM. Work, two SRAM read and write are in the process of converting a state of rotation, the conversion process of the same, but the state staggered to ensure that data can be continuously written and read out Qizhen depositors.
Platform: | Size: 1024 | Author: smj1980 | Hits:

[source in ebook] VHDL

Description: 高质量的VHDL代码乒乓处理FIFO缓存-High-quality VHDL code deal with ping-pong FIFO cache
Platform: | Size: 1024 | Author: wode | Hits:

[VHDL-FPGA-Verilog] UART

Description: 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Platform: | Size: 1106944 | Author: xiao cao | Hits:

[VHDL-FPGA-Verilog] pong

Description: Pong is a mixed schematic, VHDL, Verilog project featuring the PS2 and VGA monitor connections of the Xilinx\Digilent Spartan-3 demo board.
Platform: | Size: 74752 | Author: wangfeng | Hits:

[VHDL-FPGA-Verilog] pingpangVHDL

Description: 据说是 vhdl的乒乓ram 代码 提供给大家做个参考吧 -It is said VHDL code of the ping-pong ram available to the U.S. to be a reference to it
Platform: | Size: 1024 | Author: 白饭 | Hits:

[VHDL-FPGA-Verilog] pingpang

Description: 关于乒乓操作的，对于数据缓存有很大的用处-On the ping-pong operation of data cache for the great usefulness of
Platform: | Size: 166912 | Author: 敬亮 | Hits:

[Button control] ppong

Description: FGPA code to implement a ping-pong game. There will be LEDs simulating the path of ball , and two button representing the player. The player should hit the button when the ball reach his end. If the player hit the ball, it will go to the other player. When the player does not hit at the right time, he will lose.-FGPA code to implement a ping-pong game. There will be LEDs simulating the path of ball , and two button representing the player. The player should hit the button when the ball reach his end. If the player hit the ball, it will go to the other player. When the player does not hit at the right time, he will lose.
Platform: | Size: 196608 | Author: lzm | Hits:

[Software Engineering] pong

Description: software testing code and debugging using vhdl
Platform: | Size: 203776 | Author: sandeep kumar | Hits:

[VHDL-FPGA-Verilog] fft_1024_hdl

Description: 一个 1024 点 FFT ， 基 4 蝶形运算架构， 5级流水，乒乓内存，有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
Platform: | Size: 18432 | Author: wei | Hits:

[VHDL-FPGA-Verilog] fpga_pong

Description: fpga code for pong game
Platform: | Size: 569344 | Author: kasmi | Hits:

[MPI] dpram2

Description: ram的读写，使用状态机完成，两片ram实现乒乓操作-ram read and write, using the state machine completed, two ping-pong operation to achieve ram
Platform: | Size: 1024 | Author: 李群 | Hits:

[VHDL-FPGA-Verilog] Wiley.FPGA.Prototyping.by.VHDL.Examples.Xilinx.Sp

Description: Wiley,FPGA Prototyping by VHDL examples Spartan 3 version,Pong Chu,
Platform: | Size: 17548288 | Author: lefteris | Hits:

[VHDL-FPGA-Verilog] sram_060803

Description: SRAM的读写代码，对SRAM进行了乒乓操作，用VHDL语言进行设计，很有参考价值，甚至可以直接复制代码来进行自己的设计-SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to carry out their own designs
Platform: | Size: 198656 | Author: hongliang | Hits:

[VHDL-FPGA-Verilog] VHDL-Ping-pong

Description: 基于VHDL的乒乓球游戏的设计，包含代码，仿真结果等。-Table tennis game in VHDL-based design, including the code, the simulation results.
Platform: | Size: 3072 | Author: 李皓 | Hits:

[VHDL-FPGA-Verilog] pong

Description: pong in vhdl code fo fpga
Platform: | Size: 60416 | Author: muhameed | Hits:

[Other] pong

Description: pomg ps/2 vhdl cyclone 1
Platform: | Size: 8254464 | Author: igor5451 | Hits:
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