Search - pulse generator

[VHDL-FPGA-Verilog] 双路脉冲发生器（veralog）

Description: Verilog HDL 程序双路脉冲发生器的代码包含了键盘控制，LED显示，脉冲发生，脉冲频率测量模块是我自己写得，希望能对你有帮助，有问题可以mail：shaojunwu1@163.com-Verilog HDL dual-channel pulse generator procedure code includes a keyboard control, LED display, pulse, pulse frequency measurement module is written I hope to help you, it can be mail : shaojunwu1@163.com
Platform: | Size: 4096 | Author: 邵君武 | Hits:

[Other] Single_Pulse

Description: 单个脉冲发生器的multisim9仿真文件-single pulse generator simulation document multisim9
Platform: | Size: 282624 | Author: 欧阳菲菲 | Hits:

[Other] pulse

Description: 脉冲发生器，可实现脉宽和幅度的任意调节。相信对大家有用。-Pulse generator, pulse width and amplitude can realize arbitrary regulation. I believe it useful to everyone.
Platform: | Size: 514048 | Author: sdcsadf | Hits:

[VHDL-FPGA-Verilog] svc_timer33ms

Description: Verilog 下脉冲发生器的源代码，可用于模拟三相交流电过零点，主要用于调试一些类似SVC（无功补偿）控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) controller of a number of algorithms
Platform: | Size: 763904 | Author: huangyongbing | Hits:

[VHDL-FPGA-Verilog] answermachine5

Description: 这次设计的抢答器主要四部分组成，由优先编码器，寄存器和译码器组成的抢答电路，十进制计数器组成的倒计时电路，555定时器组成的秒脉冲发生器，十六进制计数器组成的计数器。-The design of the Responder mainly of four parts, by the priority encoder, register, and the composition of the answer in the decoder circuit, consisting of decimal counter countdown circuit, 555 timer pulse generator consisting of seconds, consisting of the hexadecimal counter counter.
Platform: | Size: 311296 | Author: 小王珊珊 | Hits:

[Other] 2-Beam-Pulse-Generator-Circuit

Description: 2-Beam Pulse Generator Circuit
Platform: | Size: 144384 | Author: ahmet | Hits:

[VHDL-FPGA-Verilog] NC-pulse-generator

Description: 电工电子实验（数控脉冲信号发生器）详细讲解课件-Electronics Experiment (NC pulse generator) explain in detail Courseware
Platform: | Size: 1107968 | Author: 彦英 | Hits:

[matlab] UWB_Pulse_generator

Description: UWB Pulse Generator using Simulink
Platform: | Size: 7168 | Author: foch_4391 | Hits:

[VHDL-FPGA-Verilog] Controlled-pulse-generator

Description: 可控脉冲波发生器，可产生脉冲波形，随意控制-Controlled pulse generator
Platform: | Size: 102400 | Author: 王经纬 | Hits:

[SCM] 555-pulse-generator

Description: 单片机控制555脉冲发生器产生脉冲波形，使用KEIL软件编辑-SCM control pulse 555 pulse generator, using KEIL software editor
Platform: | Size: 27648 | Author: 骆郑钧 | Hits:

[matlab] generator

Description: 使用simulink建立一个脉冲信号发生器-Using a pulse generator simulink
Platform: | Size: 7168 | Author: anto | Hits:

[Windows Develop] STATCOM-pulse-generator

Description: _50Mvar链式STATCOM脉冲发生器设计-_50Mvar Chain STATCOM pulse generator design
Platform: | Size: 400384 | Author: zhwb | Hits:

[VHDL-FPGA-Verilog] controllable-pulse-generator

Description: 清华数字集成电路课程，可控脉冲发生器（占空比和周期可调）,仅供新手学习之用-controllable pulse generator
Platform: | Size: 1024 | Author: 王志斌 | Hits:

[Software Engineering] FPGA-pulse-generator

Description: FPGA实现脉冲发生器，讲解了其思路、方法和原理，并提供相关的电路设计图-FPGA implementation of a pulse generator, explain the ideas, methods and principles, and provides the circuit design related
Platform: | Size: 819200 | Author: joy | Hits:

[Other] Pulse-Generator

Description: Pulse Generator circuit with ATmega8 32 pin SQMF chip...Good for Radio electronics
Platform: | Size: 51200 | Author: manoj | Hits:

[Software Engineering] Pulse-Generator-Final-Zip

Description: A VHDL pulse generator that generates customizable square wave pulses on an arbitrary number of channels. Controlled by UART communication through serial port. Tuned for 5ns period clock signal. The pulse width and delay of each channel is fully adjustable through serial port while the design is running. Channels can also be turned on and off.
Platform: | Size: 17408 | Author: Eugene | Hits:

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