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Description: 本软件在CPLD上实现数字PWM控制,用Verilog HDL语言编写,在MAX PLUS II调试成功,可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
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Size: 232453 |
Author: wjz |
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Description: verilog HDL 编写的PWM,是初学CPLD者入门Z资源,epm7128stc100-10-verilog HDL prepared by the PWM, is a novice CPLD Getting Started Z resources, epm7128stc100-10
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Size: 236956 |
Author: 章风 |
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Description: PWM Verilog HDL原码和底层C驱动,即测试程序,可直接使用
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Size: 22328 |
Author: 李其 |
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Description: PWM的Verilog HDL代码用于FPGA
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Size: 2390 |
Author: 张猛蛟 |
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Description: 浅显易懂的vrilogHDL的程序,可以帮助你迅速上手-Easy and simple VerilogHDL programs to help you to get to the language quickly.
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Size: 158720 |
Author: 陈浩东 |
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Description: 本软件在CPLD上实现数字PWM控制,用Verilog HDL语言编写,在MAX PLUS II调试成功,可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
Platform: |
Size: 232448 |
Author: wjz |
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Description: 基于PID的介绍及实现,程序编写等自动温度控制-PID-based presentation and realized, programmers and other automatic temperature control
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Size: 177152 |
Author: |
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Description: verilog HDL 编写的PWM,是初学CPLD者入门Z资源,epm7128stc100-10-verilog HDL prepared by the PWM, is a novice CPLD Getting Started Z resources, epm7128stc100-10
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Size: 236544 |
Author: 章风 |
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Description:
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Size: 22528 |
Author: 李其 |
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Description: PWM的Verilog HDL代码用于FPGA-PWM of the Verilog HDL code for FPGA
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Size: 2048 |
Author: 张猛蛟 |
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Description: pwm的占空比和死区时间可调的Verilog HDL程序设计和测试-duty cycle of pwm and adjustable dead time of the Verilog HDL design and testing procedures
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Size: 1024 |
Author: chenhaoran |
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Description: altera公司网站上的详细的PWM设计的Verilog hdl源程序,大多数都采用这个-altera company' s Web site the detailed design of the PWM source Verilog hdl, most have adopted this
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Size: 2048 |
Author: Mrshen |
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Description: 基于Verilog HDL的直流无刷电机控制程序,Quartus II环境下编写。-Verilog HDL for BLDCM Control in Quartus II。
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Size: 198656 |
Author: 琉璃 |
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Description: 利用FPGA可编程芯片及Verilog HDL语言实现了对直流电机PwM控制器的设计,对直流电机速度进行控制。介绍了用Verilog HDL语言编程实现直流电机PwM控制器的PwM产生模块、串口通信模块、转向调节模块等功能,该系统无须外接D/A转换器及模拟比较器,结构简单,控制精度高,有广泛的应用前景。同时,控制系统中引入上位机控制功能,可方便对电机进行远程控制。-Using FPGA programmable chip and Verilog HDL language for the design of DC motor PwM controller, DC motor speed control. Introduced with the Verilog HDL language programming controller PwM DC PwM generated module, serial communication module, steering adjustment module and other functions, the system is an external D/A converters and analog comparators, simple structure, high control precision, there a wide range of applications. Meanwhile, the introduction of PC control system control functions can be easily remote control the motor.
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Size: 4268032 |
Author: 杨汉轩 |
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Description: 单片机通过总线,将占空比和频率送到CPLD/FPGA中,并控制PWM输出.采用Verilog HDL语言编写。-Microcontroller by bus, the duty cycle and frequency sent to the CPLD/FPGA in, and control the PWM output. Using Verilog HDL language.
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Size: 254976 |
Author: zhouming |
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Description: Verilog HDL编写的PWM,已运行-PWM Verilog HDL prepared
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Size: 241664 |
Author: jessie |
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Description: verilog描述 PWM IP核
内部包括载波 占空比 和时能寄存器-IP kernel of PWM based on Verilog hdl
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Size: 4096 |
Author: 胡静 |
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Description: PWM IP 核的verilog HDL代码-CODE of the PWM IP
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Size: 1024 |
Author: mr li |
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Description: 应用verilog.HDL编写的PWM波的生成程序-Generation of application of verilog.HDL to prepare PWM wave
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Size: 4211712 |
Author: 王明亮 |
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Description: VERILOG语言 控制的直流电机 在各大数字逻辑软件如VIVADO ise 均可使用
功能强大 简单易学(motor controlled by
VERILOG HDL)
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Size: 10240 |
Author: 铭润 |
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