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Description: QUARTUS II实现的简易3 8译码器
Platform: |
Size: 58634 |
Author: yzhh029 |
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Description: quartus 软件应用中文教程,包含一些高级的用法等。-quartus Chinese Directory software applications, including some senior usage, and so on.
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Size: 6616064 |
Author: Frank |
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Description: 三八译码器的源代码,在quartus II 6.0中进行进行设计的,有vhdl源代码-March 8 decoder source code, in quartus II 6.0 for the design, Source code is vhdl
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Size: 151552 |
Author: 孙彤 |
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Description: 8位的加法器设计,分4个工程完成的,用的是Quartus II软件。-eight of the adder design, four hours to complete the project, using the Quartus II software.
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Size: 520192 |
Author: jk |
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Description: 4*8矩阵键盘的驱动程序。QuartusII5.0编译通过!-4* 8 matrix keyboard driver. QuartusII5.0 compiled through!
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Size: 231424 |
Author: sunhao |
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Description: 骏龙提供的最新quartus8.0的license,包括Quartus II 8.0,NIOS II 8.0(在Quartus II的license里面),DSP Builde 8.0,ModelSim-Altera 6.1g (Quartus II 8.0),新Quartus II的license支持远程桌面访问的功能。-Cytech latest quartus8.0 the license, including the Quartus II 8.0, NIOS II 8.0 (in the Quartus II
Platform: |
Size: 332800 |
Author: 王网 |
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Description: quartus II 8.0sp1 patch破解文件-quartus II 8.0sp1 patch crack file
Platform: |
Size: 798720 |
Author: 王京 |
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Description: quartus 8 的内存注册机,已经试验过,非常好用,完全破解。-quartus 8 Zhuceji memory has been tested, very easy to use, completely broken.
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Size: 15360 |
Author: 庄保国 |
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Description: QUARTUS-7.2的破解软件,可以破解QUARTUS-7.2,能用到2034年。-The crack QUARTUS-7.2 software, can crack QUARTUS-7.2, can be used to in 2034.
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Size: 337920 |
Author: 苏洲 |
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Description: 学verilog时写的8位十进制频率计,开发环境为quartus II6.0.-When learning to write Verilog 8-bit decimal frequency, the development environment for quartus II6.0.
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Size: 17408 |
Author: lv |
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Description: 最新QuartusII8.1的补丁,安装它的破解器,可以获得长期使用权-QuartusII8.1 the latest patch, install it to break, and access to long-term use rights
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Size: 14336 |
Author: zxl |
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Description: 此模块用于"PS/2接口的鼠标或键盘"与"具有外部读写的8位并口单片机"双向通信模块.
Verilog HDL语言编写,在Quartus II 8.1 (32-Bit)软件中编译,并下载至EPM7128SLC84-10芯片中通过.
文件中有详细的注解.
此模块具有对于PS/2时钟和数据线的滤波功能,这样减少外部干扰,保证通信的可靠性!
-This module for the "PS/2 mouse or keyboard interface" and "read and write with an external parallel port single-chip 8" two-way communication module. Verilog HDL language, in the Quartus II 8.1 (32-Bit) software compiler and downloaded to EPM7128SLC84-10 chip through. document detailed comments. This module has the PS/2 clock and data line filtering, so that to reduce the external interference, and ensure the reliability of communication!
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Size: 5120 |
Author: yuantielei |
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Description: 通过VHDL实现4位全加器,8位全加器,和8位通用寄存器的设计-4-bit full adder
8-bit full adder
8-bit register
using vhdl
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Size: 924672 |
Author: yepp_u2 |
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Description: 512×8bid的FIFO 含工程文件,基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII
Platform: |
Size: 4096 |
Author: 邵捷 |
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Description: quartus 8.1 ipcore lic,包含ddr、ddr2、fir、nco-quartus 8.1 ipcore lic, with ddr, ddr2, fir, nco
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Size: 29696 |
Author: wcm |
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Description: A way to evalulate Quartus 8.1
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Size: 400384 |
Author: efarem |
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Description: 对PS2接口键盘的简单操作,利用VHDL语言编写,在Quartus 8.1环境下测试通过,可以建立波形文件做仿真实验-source code for PS2 keyboard
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Size: 58368 |
Author: youungsky |
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Description: quartus版本的破解 从6.1至9.0间所有版本-quartus crack version from 6.1 to 9.0 all versions
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Size: 138240 |
Author: ziluolee |
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Description: DSP builder6.0-9.0和quartus ii6.0-9.0等版本的破解器,注意运行破解器时最好关闭杀毒软件,否则有可能会出错-DSP builder6.0-9.0 and quartus ii6.0-9.0 and other versions of the cracker, pay attention to when the best off running the cracker antivirus software, or they may be wrong
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Size: 137216 |
Author: |
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Description: this vhdl code. using quartus 8.1 web edition. for using dot matrix. device name is altera cyclone2-this is vhdl code. using quartus 8.1 web edition. for using dot matrix. device name is altera cyclone2
Platform: |
Size: 106496 |
Author: kimjuhyun |
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