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[Embeded-SCM Develop] Quartus II 交通灯课程设计（成功版）

Description: 这是一个由Quartus II 运行的交通灯课程设计，正在学习的朋友可以下载来看看。
Platform: | Size: 711081 | Author: chenz_168@126.com | Hits:

[Program doc] 用Quartus II对状态机进行功能仿真和时序仿真

Description: 用Quartus II对状态机进行功能仿真和时序仿真,不需要编写测试向量。文档附详细的操作步骤。
Platform: | Size: 713216 | Author: heyishow | Hits:

[VHDL-FPGA-Verilog] quartus II中文用户教程(英文版的完全翻译）

Description: quartus II中文用户教程(英文版的完全翻译）,和一切爱好可编程器件的同仁共勉之-Quartus II Chinese user guide (English version of the full translation) love and all programmable devices colleagues share Zhi
Platform: | Size: 844800 | Author: 田晶昌 | Hits:

[Other] 02-Designing_with_Quartus_II_v5_0

Description: 使用Quartus II 5.0开发指导手册-use Quartus II 5.0 development guidance manual
Platform: | Size: 11830272 | Author: KC_P | Hits:

[Software Engineering] intro_to_quartus2_v6.0_chinese

Description: quartus II 6.0 中文使用手册 intro_to_quartus2_chinese-Chinese quartus II 6.0 manual intro_to_quartus2_ english
Platform: | Size: 2068480 | Author: yysh | Hits:

[source in ebook] Crack_QII60_b178

Description: Quartus II 6.0完全Crack文件-Quartus II 6.0 document completely Crack
Platform: | Size: 6144 | Author: 江纵海 | Hits:

[Other Embeded program] 38encode

Description: 三八译码器的源代码，在quartus II 6.0中进行进行设计的，有vhdl源代码-March 8 decoder source code, in quartus II 6.0 for the design, Source code is vhdl
Platform: | Size: 151552 | Author: 孙彤 | Hits:

[Other] AlteraQuartusII6.0crack

Description: Altera Quartus II 6.0 破解文件-Altera Quartus II 6.0 crack documents
Platform: | Size: 6144 | Author: 王国华 | Hits:

[Embeded-SCM Develop] CF_NiosII5.0

Description: Compact Flash Support For Nios II 5.0, To download supporting materials for this new Compact Flash support, download the following .zip file, extract to a computer with Quartus II 5.0 & Nios II 5.0 installed, and proceed to use the hardware and/or software examples of your choice to proceed. Additional information is available in the readme.txt document, included in the top-level of the .zip file
Platform: | Size: 1589248 | Author: Robert | Hits:

[VHDL-FPGA-Verilog] core_arm.tar

Description: ARM7系统IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。-ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
Platform: | Size: 666624 | Author: 周华茂 | Hits:

[Other Embeded program] VBuffer.1.1

Description: 视频采集，存储，发送的VERILOG源程序； QUARTUS II 6.0调试通过。-Video capture, store, send the Verilog source code QUARTUS II 6.0 debug through.
Platform: | Size: 4146176 | Author: yan | Hits:

[Other] CLOCK

Description: 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital clock. The main function of the completion are: time function, 24-hour time display through the Seven-Segment LED dynamic display time school settings function, can be set hours, minutes, seconds the stopwatch to start, stop, and maintain display and removal.
Platform: | Size: 182272 | Author: 张保平 | Hits:

[SCM] 16bit_display8bitLED

Description: Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. Introduction to use the environment: Quartus II 7.2 SP1+ DE2 (Cyclone II EP2C35F627C6) the use of a simple switch as a binary input 2, and paragraph 8-digit binary display 16 results.
Platform: | Size: 7168 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: 用状态机对A/D转换器0809的采样控制电路的实现。工具：Quartus ii 6.0 语言：VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
Platform: | Size: 46080 | Author: 杨晴飞 | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_NIOS_HOST_MOUSE_VGA

Description: 在ALTERA的DE2开发板上做的关于HOST_MOUSE的例子，基于Quartus II 和SOPC Builder以及Nios II IDE平台所完成！-ALTERA development in the DE2 board to do on HOST_MOUSE example, based on the Quartus II and SOPC Builder and Nios II IDE platform completed!
Platform: | Size: 1874944 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_SD_Card_Audio

Description: 在ALTERA的DE2板子上做的一个读写SD卡的例子，基于QUARTUS II ,SOPC BUILDER ,Nios II IDE实现的，从SD卡读写东西-The DE2 board in ALTERA do an SD card reader example, based on the QUARTUS II, SOPC BUILDER, Nios II IDE achieved something from the SD card reader
Platform: | Size: 1816576 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] pipeline

Description: 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
Platform: | Size: 3028992 | Author: kevin | Hits:

[Other] Crack_patch_license

Description: Quartus II 6.0 破解补丁和license设置-Quartus II 6.0 crack patch and license settings
Platform: | Size: 5120 | Author: jjx | Hits:

[VHDL-FPGA-Verilog] crack

Description: Altera Quartus II 10.1最新破解文件，本人一直独家专用，X86和X64都有。-Altera Quartus II 10.1 latest crack file, I have been exclusively dedicated, X86 and X64 have.
Platform: | Size: 769024 | Author: sunnic-atom | Hits:

[VHDL-FPGA-Verilog] Quartus II 6.0 Handbook

Description: Altera's Quartus II 6.0 Handbook
Platform: | Size: 26749766 | Author: alz4062 | Hits:
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