Search - quartus II 8.0

[Other resource] 38encode

Description: 三八译码器的源代码，在quartus II 6.0中进行进行设计的，有vhdl源代码-March 8 decoder source code, in quartus II 6.0 for the design, Source code is vhdl
Platform: | Size: 152173 | Author: 孙彤 | Hits:

[Other resource] b8bit_adder

Description: 8位的加法器设计，分4个工程完成的，用的是Quartus II软件。-eight of the adder design, four hours to complete the project, using the Quartus II software.
Platform: | Size: 520064 | Author: jk | Hits:

[Other resource] fifo8_8

Description: 8*8位的fifo数据缓冲器的vhdl源程序。经过quartus ii 6.0 验证成功。
Platform: | Size: 1088 | Author: 李松 | Hits:

Description: 骏龙提供的最新quartus8.0的license，包括Quartus II 8.0，NIOS II 8.0（在Quartus II的license里面），DSP Builde 8.0，ModelSim-Altera 6.1g (Quartus II 8.0)，新Quartus II的license支持远程桌面访问的功能。
Platform: | Size: 333553 | Author: 王网 | Hits:

[Other] 80sp1crack

Description: quartus II 8.0sp1 patch破解文件
Platform: | Size: 798836 | Author: 王京 | Hits:

[VHDL-FPGA-Verilog] Nios II处理器中文参考手册

Description: nios2软件开发手册中文版第8章_MicroC_OSII_tutorial，翻译的不错值得一看-nios2 software development manuals Chinese version of Chapter 8 _MicroC_OSII_tutori al translation of a true eye-catcher
Platform: | Size: 259072 | Author: wang | Hits:

[Other Embeded program] 38encode

Description: 三八译码器的源代码，在quartus II 6.0中进行进行设计的，有vhdl源代码-March 8 decoder source code, in quartus II 6.0 for the design, Source code is vhdl
Platform: | Size: 151552 | Author: 孙彤 | Hits:

[VHDL-FPGA-Verilog] b8bit_adder

Description: 8位的加法器设计，分4个工程完成的，用的是Quartus II软件。-eight of the adder design, four hours to complete the project, using the Quartus II software.
Platform: | Size: 520192 | Author: jk | Hits:

[Other] 4_in_1

Description: 骏龙提供的最新quartus8.0的license，包括Quartus II 8.0，NIOS II 8.0（在Quartus II的license里面），DSP Builde 8.0，ModelSim-Altera 6.1g (Quartus II 8.0)，新Quartus II的license支持远程桌面访问的功能。-Cytech latest quartus8.0 the license, including the Quartus II 8.0, NIOS II 8.0 (in the Quartus II
Platform: | Size: 332800 | Author: 王网 | Hits:

[Other] 80sp1crack

Description: quartus II 8.0sp1 patch破解文件-quartus II 8.0sp1 patch crack file
Platform: | Size: 798720 | Author: 王京 | Hits:

[VHDL-FPGA-Verilog] Crack_QII8.0

Description: quartus 8 的内存注册机，已经试验过，非常好用，完全破解。-quartus 8 Zhuceji memory has been tested, very easy to use, completely broken.
Platform: | Size: 15360 | Author: 庄保国 | Hits:

[VHDL-FPGA-Verilog] quartusII8.0_crack

Description: quartusii8.0正式版破解器,正式版可到官网去下载。http://www.altera.com.cn/-quartusii8.0_crack
Platform: | Size: 15360 | Author: hanhaili | Hits:

[SCM] 16bit_display8bitLED

Description: Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. Introduction to use the environment: Quartus II 7.2 SP1+ DE2 (Cyclone II EP2C35F627C6) the use of a simple switch as a binary input 2, and paragraph 8-digit binary display 16 results.
Platform: | Size: 7168 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] NIOS_TFT

Description: 用Quartus II 8.0（32bit），NIOS编译环境下，用TFT做的一个数码相框，附加原理图和veri-log程序代码-Using Quartus II 8.0 (32bit), NIOS compiler environment, TFT do with a digital photo frame, attached schematic and program code veri-log
Platform: | Size: 14394368 | Author: 涂龙 | Hits:

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[Other resource] 38encode

[Other resource] b8bit_adder

[Other resource] fifo8_8

[Other] 4_in_1

[Other] 80sp1crack

[VHDL-FPGA-Verilog] Nios II处理器中文参考手册

[Other Embeded program] 38encode

[VHDL-FPGA-Verilog] b8bit_adder

[Other] 4_in_1

[Other] 80sp1crack

[VHDL-FPGA-Verilog] Crack_QII8.0

[VHDL-FPGA-Verilog] quartusII8.0_crack

[SCM] 16bit_display8bitLED

[VHDL-FPGA-Verilog] NIOS_TFT

[VHDL-FPGA-Verilog] The-Duck

[VHDL-FPGA-Verilog] quartusII8.0_crack

[VHDL-FPGA-Verilog] Crack_QII81_FULL_License

[VHDL-FPGA-Verilog] Multiplier_quartus-II8.0

[VHDL-FPGA-Verilog] Quartus II 8.0 Handbook

[VHDL-FPGA-Verilog] Quartus II 8.1 Handbook

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