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Description: Firewall Log Daemon是一个用C编写的程序，它实时监视IP链或IP表日志警告。程序将启动一个小型后台监控进程，通过读取由系统日志写的FIFO来分析和解决防火墙日志。它可以查询一批警告，并将它们用邮件发送给你，或是由一个脚本用来处理现存的日志文件或数据流。它的功能有主机名，端口，协议，和ICMP类型/代码检查，可以由用户定义模板来格式化输出-Firewall Log daemon is a C preparation procedures, which real-time monitoring of IP or IP chain warned log table. Procedures will launch a small background monitoring process through the system log read from the FIFO write to analyze and solve firewall log. It can find a number of warnings, and use them to send mail to you, or from a script to handle the existing log file or data stream. It is the function of host name, port, protocol, and ICMP type / code inspection, by the user-defined templates to format output
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Size: 115194 |
Author: 张光强 |
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Description: Wavelets have widely been used in many signal and image processing applications. In this paper, a new
serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet
transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline
architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is
done using a tree of carry save adders to ensure the high speed processing required for many applications.
The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis
reveals that the proposed architecture, implemented using current VLSI technologies, can process a
video stream in real time.-Wavelets have been widely used in many sign al and image processing applications. In this p aper. a new serial-parallel architecture for wavele t-based image compression is introduced. It is based on a 4-tap wavelet transform. which is realized using some FIFO memory module 's implementing a pixel-level pipeline archite cture to compress and decompress images. The're al filter calculation over 4 blocks window is done using a tree of carry save adders to ensure t he high speed processing required for many appl ications. The details of implementing both com pressor decompressor and sub-systems are give n. The primarily analysis reveals that the prop osed architecture, VLSI implemented using current technologies, can process a video stream in real time.
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Size: 2837459 |
Author: sdfafaf |
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Description: 提出了利用fifo,实现dsp之间的高速、实时、可靠的数据传输,介绍了fifo原理及性能特点，详细阐述了系统的硬
件接口电路及软件设计。
-the use fifo achieve dsp between the high-speed, real-time, reliable data transmission, fifo on the principles and performance characteristics of a detailed description of the hardware and software interface circuit design.
Platform: |
Size: 87149 |
Author: 权溪 |
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Description: 以TI公司的DSP芯片TMS32OC6204为例，结合IDT公司的先进先出缓存芯片IDT72V3640，介绍了其扩展总线XB在DMA控制下对FIFO进行读写，以实现对图像的实时采集、处理。
-to TI's DSP TMS32OC6204 example, The combined company IDT FIFO-chip cache IDT72V3640. on the expansion of the bus XB under the control of DMA FIFO read, write, in order to achieve the real-time image acquisition, handle.
Platform: |
Size: 248176 |
Author: 权溪 |
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Description: Firewall Log Daemon是一个用C编写的程序，它实时监视IP链或IP表日志警告。程序将启动一个小型后台监控进程，通过读取由系统日志写的FIFO来分析和解决防火墙日志。它可以查询一批警告，并将它们用邮件发送给你，或是由一个脚本用来处理现存的日志文件或数据流。它的功能有主机名，端口，协议，和ICMP类型/代码检查，可以由用户定义模板来格式化输出-Firewall Log daemon is a C preparation procedures, which real-time monitoring of IP or IP chain warned log table. Procedures will launch a small background monitoring process through the system log read from the FIFO write to analyze and solve firewall log. It can find a number of warnings, and use them to send mail to you, or from a script to handle the existing log file or data stream. It is the function of host name, port, protocol, and ICMP type/code inspection, by the user-defined templates to format output
Platform: |
Size: 114688 |
Author: 张光强 |
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Description: Wavelets have widely been used in many signal and image processing applications. In this paper, a new
serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet
transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline
architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is
done using a tree of carry save adders to ensure the high speed processing required for many applications.
The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis
reveals that the proposed architecture, implemented using current VLSI technologies, can process a
video stream in real time.-Wavelets have been widely used in many sign al and image processing applications. In this p aper. a new serial-parallel architecture for wavele t-based image compression is introduced. It is based on a 4-tap wavelet transform. which is realized using some FIFO memory module 's implementing a pixel-level pipeline archite cture to compress and decompress images. The're al filter calculation over 4 blocks window is done using a tree of carry save adders to ensure t he high speed processing required for many appl ications. The details of implementing both com pressor decompressor and sub-systems are give n. The primarily analysis reveals that the prop osed architecture, VLSI implemented using current technologies, can process a video stream in real time.
Platform: |
Size: 2837504 |
Author: sdfafaf |
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Description: 提出了利用fifo,实现dsp之间的高速、实时、可靠的数据传输,介绍了fifo原理及性能特点，详细阐述了系统的硬
件接口电路及软件设计。
-the use fifo achieve dsp between the high-speed, real-time, reliable data transmission, fifo on the principles and performance characteristics of a detailed description of the hardware and software interface circuit design.
Platform: |
Size: 87040 |
Author: 权溪 |
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Description: 以TI公司的DSP芯片TMS32OC6204为例，结合IDT公司的先进先出缓存芯片IDT72V3640，介绍了其扩展总线XB在DMA控制下对FIFO进行读写，以实现对图像的实时采集、处理。
-to TI's DSP TMS32OC6204 example, The combined company IDT FIFO-chip cache IDT72V3640. on the expansion of the bus XB under the control of DMA FIFO read, write, in order to achieve the real-time image acquisition, handle.
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Size: 247808 |
Author: 权溪 |
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Description: rtCell 实时微内核－具有下列功能：
1. 完全抢占的实时微内核结构，独立的内核栈，中断和系统调用均切换到内核栈执行；
2. 256(64、32)个优先级，0为最高优先级（系统保留），256(64、32)为空闲优先级；
3. 不同优先级任务完全抢占，同优先级之间可按先进先出或时间片轮转方式执行；
-rtCell real-time micro-kernel- with the following features: 1. fully seize the real-time micro-kernel structure, independent kernel stack, interrupt and system calls are switched to the kernel stack implementation 2.256 (64,32) priority level , 0 as the highest priority (System reservation), 256 (64,32) for the idle priority 3. different priority tasks fully occupy the same priority can be FIFO or time between the film rotary manner
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Size: 108544 |
Author: 阿斗 |
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Description: rtlinux下实时部分和非实时部分通讯的程序fifo，测试通过-under RTLinux real-time part and non-real-time part of the process of communication fifo, test
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Size: 63488 |
Author: 王汉斌 |
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Description: DM642 接硬盘的方案，利用FPGA作FIFO缓冲，达到数据/图像/视频的实时高速写入。-DM642 access the hard disk of the program, the use of FPGA for FIFO buffer to data/images/video real-time high-speed write.
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Size: 2846720 |
Author: 李东平 |
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Description: 基于高速数字信号处理器(DSP) 和大规模现场可编程门阵列( FPGA) ,成功地研制了小型
化、低功耗的实时视频采集、处理和显示平台. 其中的DSP 负责图像处理,其外围的全部数字逻辑功能都集成在一片FPGA 内,包括高速视频流FIFO、同步时序产生与控制、接口逻辑转换和对视频编/ 解码器进行设置的I2 C 控制核等. 通过增大FIFO 位宽、提高传输带宽,降低了占用EMIF 总线的时间 利用数字延迟锁相环逻辑,提高了显示接口时序控制精度. 系统软件由驱动层、管理层和应用层组成,使得硬件管理与算法程序设计彼此分离,并能协同工作. 系统中的图像缓冲区采用了
三帧的配置方案,使得该平台最终具有对PAL/ N TSC 两种制式的全分辨率彩色复合视频信号进行实时采集、显示和处理的能力.-Based on high-speed digital signal processor (DSP) and large-scale field programmable gate array (FPGA), successfully developed a smaller, low-power real-time video capture, processing and display platform. One of the DSP is responsible for image processing, all its external digital logic functions are integrated in a FPGA, including high-speed video streaming FIFO, synchronous sequential generate and control, conversion and interface logic for video encoder/decoder to set up the control of nuclear and other I2 C. through increased FIFO bit width, increase the transmission bandwidth, reducing the time occupied by EMIF bus delay phase-locked loop using digital logic,
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Size: 546816 |
Author: John |
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Description: 原创，STM32F103R8T6为控制器，芯片内部的实时时钟以0.5秒1次向串口发送数据，串口使用了软件FIFO，使用了UCOSII系统，编译环境IAR5.20-Originality, STM32F103R8T6 for the controller, the chip' s internal real time clock to 0.5 seconds one time sending data to the serial port, serial use of a software FIFO, using UCOSII system, the compiler environment IAR5.20
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Size: 2099200 |
Author: grqd |
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Description: 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the phase and frequency offset between different clock domain in communication area .In this paper, an FIFO module is designed using Gray convert technology and dual-port ram , which realizing scatheless transmit between different clock domain. The advances of Gray (Only one bit changes between neighboring two clock ) improves the reliability and anti-jamming capability of the system. And the system can work normally in the bad condition which the phase and frequency offset target to 300PPM. It is proved by work that the FIFO module can fulfill the demands of real-time of data transmitting system, and the module is powerful enough for more data process in the future.
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Size: 81920 |
Author: 雷志 |
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Description: 图像缓存是图像处理系统设计的重点和难点，包括SDRAM和FIFO的设计，本PDF是设计图像缓存设计的好资料-sdram and fifo design for real-time image processing system
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Size: 1146880 |
Author: 张荣奎 |
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Description: Shows how to set up a FIFO data queue for sharing data between
real-time tasks and user-level applications. The RT task creates
two FIFOs, one for commands in from the user process and one for
status back to the user process. As declared in common.h, there
are three commands: turn the speaker on, turn it off, and set the
frequency.-Shows how to set up a FIFO data queue for sharing data between
real-time tasks and user-level applications. The RT task creates
two FIFOs, one for commands in from the user process and one for
status back to the user process. As declared in common.h, there
are three commands: turn the speaker on, turn it off, and set the
frequency.
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Size: 4096 |
Author: sijith |
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Description: Labview的一个实时FIFO例程，内含3个VI，对于学习实时部分较有帮助-A Labview Real-Time FIFO routine that includes three VI, part of the learning more real-time help
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Size: 88064 |
Author: 鹿欣 |
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Description: 近年来，随着DSP的快速发展，被广泛的应用于图像处理及目标定位[11][13][21]上，极大地提高图像处理的实时性。DSP主要用来实现扩展算法和数字信号处理的功能，其最典型的用途是实现数字图像处理算法。DSP芯片内采用大容量的SRAM作为系统的高速缓存，高达64位的数据总线带宽。在片外采用了目前流行的SDRAM、DDR2等高速大容量存储器的无缝连接，同时还支持SRAM、FIFO等各种类型的存储器，大大提高了图像的存储容量及速度。-In recent years, with the rapid development of DSP, has been widely used in image processing and target location [11] [13] [21], and greatly improve the image processing in real time. Mainly used to implement DSP algorithms and digital signal processing expansion of the function, the most typical use digital image processing algorithms. DSP chip with large-capacity SRAM cache as a system, up to 64-bit data bus bandwidth. Chip used in the popular SDRAM, DDR2 memory and other high-speed large-capacity seamless connection, and also supports SRAM, FIFO, and other types of memory, greatly improving the image storage capacity and speed.
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Size: 261120 |
Author: 侯国强 |
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Description: 近年来，随着DSP的快速发展，被广泛的应用于图像处理及目标定位[11][13][21]上，极大地提高图像处理的实时性。DSP主要用来实现扩展算法和数字信号处理的功能，其最典型的用途是实现数字图像处理算法。DSP芯片内采用大容量的SRAM作为系统的高速缓存，高达64位的数据总线带宽。在片外采用了目前流行的SDRAM、DDR2等高速大容量存储器的无缝连接，同时还支持SRAM、FIFO等各种类型的存储器，大大提高了图像的存储容量及速度。-In recent years, with the rapid development of DSP, has been widely used in image processing and target location [11] [13] [21], and greatly improve the image processing in real time. Mainly used to implement DSP algorithms and digital signal processing expansion of the function, the most typical use digital image processing algorithms. DSP chip with large-capacity SRAM cache as a system, up to 64-bit data bus bandwidth. Chip used in the popular SDRAM, DDR2 memory and other high-speed large-capacity seamless connection, and also supports SRAM, FIFO, and other types of memory, greatly improving the image storage capacity and speed.
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Size: 1499136 |
Author: 侯国强 |
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Description: 异步FIFO，实时给出读空和溢出指示，深度为256，宽度为8-Asynchronous FIFO, read real-time air and overflow indication is given
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Size: 1024 |
Author: 丁剑 |
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