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[VHDL-FPGA-Verilog] RS(32to28)encoderanddecoder

Description: RS(32,28) encoder and decoder VHDL-RS (32,28) encoder and decoder VHDL
Platform: | Size: 76800 | Author: 王文 | Hits:

[Windows Develop] MC-ACT-RSENC_DS

Description: MemecCoreReed-Solomon coding is a method of forward error correction in the form of block coding. Block coding consists of calculating a number of parity symbols over a number of message symbols. The parity symbols are appended to the end of the message symbols forming a codeword. Reed-Solomon coding is described in the form RS(n,k), where k is the number of message symbols in each block and n is the total number of symbols in the codeword. The value t defines the number of symbols that can be corrected by the Reed-Solomon code, where t=(n-k)/2 and the number of parity symbols is equal to 2t.
Platform: | Size: 95232 | Author: 张波 | Hits:

[VHDL-FPGA-Verilog] RS(31-19-6)

Description: reed-solomon译码器。共有7个文件，分别为译码器的7个模块。-reed-solomon decoder. A total of seven papers, respectively, the decoder module 7.
Platform: | Size: 9216 | Author: liwei | Hits:

[Other] RSOriginal

Description: Reed-Solomon 信道编码广泛应用于DVB中-Reed-Solomon channel coding are widely used in DVB
Platform: | Size: 11767808 | Author: 陈孙阳 | Hits:

[Software Engineering] rsenc

Description: this the code for reed solomon encoder of type 7,3. this is the main module program.-this is the code for reed solomon encoder of type 7,3. this is the main module program.
Platform: | Size: 1024 | Author: alok | Hits:

[Software Engineering] mult2

Description: this the multiplier 2 module for the reed solomon encoder-this is the multiplier 2 module for the reed solomon encoder
Platform: | Size: 1024 | Author: alok | Hits:

[Software Engineering] mult4

Description: this the multiplier 4 module for the reed solomon encoder-this is the multiplier 4 module for the reed solomon encoder
Platform: | Size: 1024 | Author: alok | Hits:

[Industry research] VLSI_Architectures_for_ECC

Description: This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.
Platform: | Size: 1072128 | Author: MicroSam | Hits:

[Other systems] reed

Description: this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
Platform: | Size: 1872896 | Author: kamranmu | Hits:

[VHDL-FPGA-Verilog] RS

Description: reed selemon encoder vhdl code
Platform: | Size: 77824 | Author: mohamed saad | Hits:

[Communication] RS_Encoder

Description: its a reed solomon encoder-its a reed solomon encoder.....
Platform: | Size: 123904 | Author: haroon | Hits:

[VHDL-FPGA-Verilog] rstk-0.7.tar

Description: archivo reed solom para utilizar en decodificacion de television digital esta en vhdl
Platform: | Size: 178176 | Author: Gus | Hits:

[VHDL-FPGA-Verilog] RS_decoder

Description: Reed solomon decoder based on table-lookup method VHDL code
Platform: | Size: 4096 | Author: shahifaqeer | Hits:

[Books] Errorcontrolcoding

Description: 信道编码非常有用的一本书，可以供通信方面的参考一下-　A reorganized and comprehensive major revision of a classic book, this edition provides a bridge between introductory digital communications and more advanced treatment of information theory. Completely updated to cover the latest developments, it presents state-of-the-art error control techniques. Coverage of the fundamentals of coding and the applications of codes to the design of real error control systems. Contains the most recent developments of coded modulation, trellises for codes, soft-decision decoding algorithms, turbo coding for reliable data transmission and other areas. There are two new chapters on Reed-Solomon codes & concatenated coding schemes. Also contains hundreds of new and revised examples and more than 200 illustrations of code structures, encoding and decoding circuits and error performance of many important codes and error control coding systems. Appropriate for those with minimum mathematical background as a comprehensive reference for coding theory.
Platform: | Size: 21752832 | Author: vidivici | Hits:

[Other] rsencoder_latest.tar

Description: reed solomon encoder (255,239) verilog source code
Platform: | Size: 4096 | Author: 梅国强 | Hits:

[VHDL-FPGA-Verilog] read_solomon

Description: This project implements a parameterized Reed Solomon decoder for use in OFDM wireless systems.
Platform: | Size: 7168 | Author: FPGACore | Hits:

[VHDL-FPGA-Verilog] rsvhdl_255_239

Description: a VHDL implementation of 255_239 reed solomon encoder.
Platform: | Size: 3072 | Author: saad | Hits:

[VHDL-FPGA-Verilog] reed_solomon_decoder_latest.tar

Description: reed solomon (204,188). in verilog.
Platform: | Size: 179200 | Author: Evgeny | Hits:

[VHDL-FPGA-Verilog] rs_dec_enc_latest.tar

Description: Reed-Solomon (255,251). in VHDL.
Platform: | Size: 92160 | Author: Evgeny | Hits:

[Program doc] RS3123

Description: Reed- So lomon (RS) 码是一种重要的纠错码, 它对随机性和突发性错误有极强的纠错能力, 广泛应用于 数字视频广播(DVB) 系统和其它数字通信领域。给出了一种GF (25) 域上的RS (31, 23) 编码器的实现算法, 介绍 了用现场可编程门阵列(FPGA ) 实现RS 编码器的原理和过程, 并给出了实现电路及其仿真的输出波形。-Reed-So lomon (RS) code is an important error-correcting code, its random and unexpected error has a strong error correction capabilities, widely used in digital video broadcasting (DVB) systems and other digital communications. Gives a GF (25) Domains RS (31, 23) algorithm of the encoder is introduced with a Field Programmable Gate Array (FPGA) RS encoder to achieve the principles and processes, and providing a circuit and simulation of the output waveform.
Platform: | Size: 360448 | Author: 王彬 | Hits:
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