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[Other resource] xapp930

Description: 基于FPGA的YUV转换RGB的色度空间转换-FPGA-based YUV conversion of RGB color space conversion
Platform: | Size: 46000 | Author: 金良 | Hits:

[Special Effects] rgb_to_yuv

Description: 运用VHDL代码写好的RGB到YUV的颜色空间变换,整个代码已经ALTERA CYCLONE2系列FPGA上验证通过了.能正常工作.
Platform: | Size: 2081 | Author: lioushifeng | Hits:

[source in ebook] xapp930

Description: 基于FPGA的YUV转换RGB的色度空间转换-FPGA-based YUV conversion of RGB color space conversion
Platform: | Size: 46080 | Author: 金良 | Hits:

[Special Effects] rgb_to_yuv

Description: 运用VHDL代码写好的RGB到YUV的颜色空间变换,整个代码已经ALTERA CYCLONE2系列FPGA上验证通过了.能正常工作.-VHDL code written to use the RGB to YUV color space conversion, the entire code ALTERA CYCLONE2 series FPGA has been tested passed. Able to work properly.
Platform: | Size: 2048 | Author: lioushifeng | Hits:

[VHDL-FPGA-Verilog] rgb2yuv

Description: 用VHDL和verilog编写的RGB颜色空间到YUV颜色空间的转换程序, 是FPGA视频处理中的常用程序!-Written in VHDL and verilog using RGB color space to YUV color space conversion process is commonly used in video processing FPGA program!
Platform: | Size: 2048 | Author: gilbert | Hits:

[VHDL-FPGA-Verilog] 20110301151907

Description: ：为解决现有视频监控系统中目标检测算法无法应付复杂的室外环境且计算量和存储量较大等问题，将像素从RGB 空间转换到YUV 空间建立基于码本的背景模型，并单独对每个码字中的亮度分量进行高斯建模，提取运动目标的轮廓后，用连通区域算法对图像进行形态 学处理。典型测试序列和ROC 数据的对比实验结果证明该算法是高效和实用的，且易于在DSP 或FPGA 等嵌入式系统上实时实现。-】In order to solve the problems that the existing motion detection algorithm in surveillance system can not work well in complex outdoor scene, and needs too much computation and memory, this paper proposes a moving objects detection algorithm based on improved codebook model. Pixels are converted from RGB space to YUV space to build the Codebook Model(CBM), and then the luminance component of each codeword is modeled by Gaussian model. The image is morphological processed by connected components algorithm. A test with the typical video sequences and the analysis of ROC data prove that the algorithm is effective and practical, and it can easily be implemented in embedded system such as DSP and FPGA.
Platform: | Size: 92160 | Author: 陈思宇 | Hits:

[VHDL-FPGA-Verilog] mkjpeg.tar

Description: 用FPGA实现的JPEG编码器，可以直接使用，内含完成说明文档，经过验证无误。-• JPEG baseline encoding JPEG ITU-T T.81 | ISO/IEC 10918-1 • Standard JFIF header v 1.01 automatic generation • Color images only (3 components, RGB 24 or 16 bit, YUV input) • Two programmable Quantization tables • Hardcoded Huffman tables (luminance and chrominance) • 2.3 to 2.7 clock cycles per one input 24 bit pixel @ 50 Quality • OPB programming and data Host interface • 4:2:2 subsampling • Source code target independent, synthesizable RTL VHDL code • Detailed documentation
Platform: | Size: 21650432 | Author: | Hits:

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