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[Special Effectsrgb_to_yuv

Description: 运用VHDL代码写好的RGB到YUV的颜色空间变换,整个代码已经ALTERA CYCLONE2系列FPGA上验证通过了.能正常工作.-VHDL code written to use the RGB to YUV color space conversion, the entire code ALTERA CYCLONE2 series FPGA has been tested passed. Able to work properly.
Platform: | Size: 2048 | Author: lioushifeng | Hits:

[VHDL-FPGA-Verilogyuv_rgb

Description: 完成ITUR656标准的视频流数据向RGB格式的转换。-Complete video streaming ITUR656 standard data format to RGB conversion. Test module
Platform: | Size: 2048 | Author: 黄涛 | Hits:

[Video Capturecamera_up

Description: Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备,另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号,然后下采样生成16bit RGB 5:6:5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转,以便适应手持式设备在移动环境中图像的捕捉。可变的同步信号极性使得可以兼容各种摄像头外设。Camera Interface兼容AMBA规范, AHB SLAVE接口,用于读取软件配置数据和设置数据存放地址和1帧数据占用的空间。-The Camera IP Core is small and flexible video data coverter. It is connected to a typical video camera ICs with 8-bit digital video data, Horizontal synchronization and Vertical synchronization signals. The core is connected through FIFO to a WISHBONE bus on the other side. Both sides of the core can operate at fully asynchronous clock frequencies. The Camera IP Core convertes 4:2:2 YCbCr video data (sometimes called YUV, but not totally the same Y is the same, while Cb and Cr are U and V multiplied by a constant) to a 24-bit RGB. 24-bit or 16-bit RGB data, downsampled from 24-bit RGB, is then sent to the system (video) memory, however conversion can also be by-passed. Interrupt can be generated after frame-buffer in system (video) memory is filled up or after setable number of horizontal lines written to frame-buffer.
Platform: | Size: 32768 | Author: 孙喆 | Hits:

[VHDL-FPGA-Verilogxapp283

Description: YUV到RGB的色彩空间转换器(VHDL,Verilog and doc)-Color Space Converter: Y’CrCb to R’G’B’
Platform: | Size: 175104 | Author: wicky | Hits:

[VHDL-FPGA-Verilogycrcb2rgb

Description: THE SOURCE REALIZE THE TRANSFORMATION FROM YUV TO RGB
Platform: | Size: 4096 | Author: qiushui | Hits:

[source in ebookrgb2y

Description: RGB信号转化为YUV信号, 已使用 完全正确-rgb to yuv ok
Platform: | Size: 2048 | Author: 荣国 | Hits:

[VHDL-FPGA-VerilogRGB_TO_YUV

Description: converter rgb to yuv
Platform: | Size: 1024 | Author: cyberia | Hits:

[VHDL-FPGA-Verilogrgb2yuv

Description: 用VHDL和verilog编写的RGB颜色空间到YUV颜色空间的转换程序, 是FPGA视频处理中的常用程序!-Written in VHDL and verilog using RGB color space to YUV color space conversion process is commonly used in video processing FPGA program!
Platform: | Size: 2048 | Author: gilbert | Hits:

[VHDL-FPGA-Verilogetd-0407109-183702-81-001[1]

Description: 文章介绍了YUV向RGB颜色空间转换的硬件电路实现算法.在高基乘法算法基础上,建立了参数化高基乘法算法模型,并给出了Verilog HDL描述 小数乘法的整数乘法近似和近似误差给予了详细的讨论.采用乘法单元复用的设计结果将在两个时钟周期内完成YUV向RGB的颜色空间转换.-This paper introduces the YUV to RGB color space conversion hardware algorithm. Matrix multiplication algorithm in high-was established based on a parametric model of the high base multiplication algorithm, and gives the Verilog HDL description decimal multiplication and integer multiplication approximation error of approximation give a detailed discussion. using multiplication unit design reuse results will be completed in two clock cycles YUV to RGB color space conversion.
Platform: | Size: 3997696 | Author: jjj | Hits:

[VHDL-FPGA-VerilogYUV2RGB

Description: 该代码可将YUV图像数据转换为VGA显示器能显示的RGB数据,R,G,B的位宽均为4,转换速度快。-The code can be converted to a YUV image data of RGB VGA monitor can display the data, R, G, B of the bit width of 4, the conversion speed.
Platform: | Size: 1024 | Author: 陈雅 | Hits:

[VHDL-FPGA-Verilogmkjpeg.tar

Description: 用FPGA实现的JPEG编码器,可以直接使用,内含完成说明文档,经过验证无误。-• JPEG baseline encoding JPEG ITU-T T.81 | ISO/IEC 10918-1 • Standard JFIF header v 1.01 automatic generation • Color images only (3 components, RGB 24 or 16 bit, YUV input) • Two programmable Quantization tables • Hardcoded Huffman tables (luminance and chrominance) • 2.3 to 2.7 clock cycles per one input 24 bit pixel @ 50 Quality • OPB programming and data Host interface • 4:2:2 subsampling • Source code target independent, synthesizable RTL VHDL code • Detailed documentation
Platform: | Size: 21650432 | Author: | Hits:

[Graph program2f0d6763eae7

Description: yuv2rgb vhdl语言 可以将yuv格式图像转换为rgb格式,非常好用- The code can be converted to a YUV image data of RGB VGA monitor can display the data, R, G, B of the bit width of 4, the conversion speed.
Platform: | Size: 16384 | Author: 宋夏 | Hits:

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