Search - risc code

[Other] RISC Package

Description: C++写的转换RISC_SPM 代码成hex code，从而使得RISC_SPM可以使用，代码及说明均在压缩包内-write C code conversion RISC_SPM into hex code, thus enabling RISC_SPM can use code and explanations were compressed within
Platform: | Size: 116378 | Author: c.li | Hits:

[Other resource] MTK1389QE_RISC_CODE

Description: mtk 1389qe risc code
Platform: | Size: 242023 | Author: Manish Sharma | Hits:

[Linux-Unix] how to obtain all swap information from a given HPUX 11.x PA-Risc server

Description: I yeild to the experts, the following code demonstrates how to obtain all swap information from a given HPUX 11.x PA-Risc server. It leverages the pstat routines to accomplish the task. However, I have on REALLY NAGGING question that I hope someone can answer. How do I obtain the lvol name for device swap. For Instance, my output is as follows:
Platform: | Size: 4512 | Author: at19850106@163.com | Hits:

[VHDL-FPGA-Verilog] 靳远－源程序

Description: 几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码-several VHDL source code, and in my preparation of a five pipelined RISC CPU code
Platform: | Size: 443392 | Author: core_design | Hits:

[ARM-PowerPC-ColdFire-MIPS] ethernet_verilog

Description: 这是一个很好的Verilog 编写的8位RISC CPU源码（可做为MCU），并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
Platform: | Size: 78848 | Author: 张念华 | Hits:

[VHDL-FPGA-Verilog] risc_cpu

Description: 这是一个Verilog HDL编写的RISC cpu的程序，该程序共10个子程序，实现了简单的RISC cpu，可供初学者参考，学习硬件描述语言，及设计方法。该程序通过了modelsim仿真验证。-This is the RISC cpu code which writed by Verilog HDL.This code has ten subprogram which came true the simple RISC cpu. Beginner can reference this example to study the Hardware discription language and the design manner. This program have passed the Modelsim validate.
Platform: | Size: 44032 | Author: 施向东 | Hits:

[ARM-PowerPC-ColdFire-MIPS] PC机程序(VB)

Description: USB接口的上位机程序，用VB开发，可以和 S3c44b0相连-Visual Basic source code, sample of connection between PC s USB and Samsung s RISC S3C44 series.
Platform: | Size: 23552 | Author: zhz | Hits:

[ARM-PowerPC-ColdFire-MIPS] embedded_risc

Description: 一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
Platform: | Size: 128000 | Author: 箫勇天 | Hits:

[Other] RISC Package

Description: C++写的转换RISC_SPM 代码成hex code，从而使得RISC_SPM可以使用，代码及说明均在压缩包内-write C code conversion RISC_SPM into hex code, thus enabling RISC_SPM can use code and explanations were compressed within
Platform: | Size: 115712 | Author: c.li | Hits:

[SCM] VHDL实现简单的8位CPU2

Description: 用VHDL实现8位的单片机！里面有开发过程和代码阿！很详细的哦-using VHDL eight of SCM! Inside the development process and code Ah! Detailed oh
Platform: | Size: 53248 | Author: 冯海 | Hits:

[SCM] 32-bit_RISC_IP_Core

Description: 32位RISC单片机verilog源码内包含说明文档经过他人测试通过-32-bit RISC single-chip Verilog source code contains documentation of others after the test
Platform: | Size: 33792 | Author: 栾日超 | Hits:

[VHDL-FPGA-Verilog] risc

Description: RISC（reduced instruction setcomputer，精简指令集计算机）是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言，能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL source code are changed language in the FPGA on the run.
Platform: | Size: 9216 | Author: zhang | Hits:

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[Other] RISC Package

[Other resource] MTK1389QE_RISC_CODE

[Linux-Unix] how to obtain all swap information from a given HPUX 11.x PA-Risc server

[VHDL-FPGA-Verilog] 靳远－源程序

[ARM-PowerPC-ColdFire-MIPS] ethernet_verilog

[VHDL-FPGA-Verilog] risc_cpu

[ARM-PowerPC-ColdFire-MIPS] PC机程序(VB)

[ARM-PowerPC-ColdFire-MIPS] embedded_risc

[Other] RISC Package

[SCM] VHDL实现简单的8位CPU2

[SCM] 32-bit_RISC_IP_Core

[VHDL-FPGA-Verilog] risc

[DVD] MTK_DVD_1389H_CHIP_8032andRISC

[Software Engineering] risc32

[Windows Develop] 8BitRISC_CPU(VERILOG)

[VHDL-FPGA-Verilog] RISC

[Linux-Unix] btcx-risc

[SCM] Code-Vision-AVR-C-11

[Linux-Unix] btcx-risc

[VHDL-FPGA-Verilog] RISC-CODE

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