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[Other resourceVerilog DHL数字钟

Description: 用Verilog DHL语言编写的一个数字钟程序,除了基本计数,还具有校时,闹钟功能-Verilog language used in the preparation of a digital clock procedures, in addition to the basic count, but also with school, an alarm clock
Platform: | Size: 1892 | Author: 谢树扬 | Hits:

[Other resourceclockv

Description: 使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.-use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions.
Platform: | Size: 5266 | Author: 刘吉 | Hits:

[Otherautoma_start

Description: 日常生活中常常会遇到由于事务繁忙或要处理的事太多,造成健忘,无序的事务管理,对个人或单位造成很大麻烦 。 本闹钟是一款集功能强大、使用便捷、精致小巧、美观大方四为一体的个人用计算机定时自动执行软件。 网络校时功能可连接至十三个互联网原子钟获取标准时间并进行调整。 1、能够方便的在您需要的时候“关闭计算机/重启计算机/注销计算机/待机计算机/打开文件(程序)”。 2、执行操作的时间设置也十分贴心,可以“定时操作/延时操作/等待操作”。 3、具备公历农历查看功能的万年历。 4、网络原子钟校时。 5、使用图形界面,内置面板,钟面窗口形状随图形改变,外形活泼可爱,特色鲜明。 6、可以设定多项闹铃任务,最大的灵活性覆盖一年365天。-daily life will often encounter as busy or to deal with too many things, causing forgetful, disorderly Management, the individual or unit cause great trouble. The alarm clock is set one powerful, easy to use and occupy small, pleasing to the eye as one of four personal computers regularly software automatically. Network school function can be connected to the Internet 13 hours clock access to standards and make the adjustments. 1. to the convenience when you need it, "closed computer / restart the computer / write-off of computer / Standby computer / open text pieces (procedures). " 2, the execution of set-up time is also very intimate, "TIMED / Delay operation / wait for the operation." 3, Lunar calendar with the calendar View function. 4, the network clock school. 5,
Platform: | Size: 615827 | Author: 乐乐 | Hits:

[OtherEWB

Description: EWB做的多功能数字钟 由振荡器输出稳定的高频脉冲信号作为时间基准,经分频器输出标准的秒脉冲,秒计数器满60向分计数器进位,分计数器满60向小时计数器进位,小时计数器按“12翻1”规律计数,计数器经译码器送到显示器;计数出现误差可用校时电路进行校时、校分、校秒, 可发挥部分:使闹钟具有可整点报时与定时闹钟的功能。 -EWB done by the multi-function digital clock oscillator output stable high frequency pulse signal as a time reference. Frequency Divider output by the standards of seconds pulse, aged 60 seconds to counter-counter rounding, Counter-to-60-hour counter rounding, by the Counter-hour "12 over a" law count, Counter by the decoder to display; Counting errors school circuit can be used for schools, school hours, school seconds to play : The alarm clock can be made with whole point regular alarm clock and timer functions.
Platform: | Size: 128811 | Author: zero | Hits:

[Software Engineeringshuzizhongsheji

Description: 多功能数字钟设计 一、设计任务: (一)主体功能 用HDL设计一个多功能数字钟,包含以下主要功能: 1.计时及校时,时间可以24小时制或12小时制显示 2.日历:显示年月日星期,及设定设定功能 3.跑表:启动/停止/保持显示/清除 4.闹钟:设定闹钟时间,整点提示 -multifunctional design of a digital clock, design tasks : (1) the main function of HDL design with a multi-function digital clock, includes the following main functions : 1. metering and school, time can be 24 hours or 12 two-hour show. Calendar : Displays date weeks, Setting function and 3. stopwatch : start / stop / maintain Display / 4 clearance. alarm clocks : Set an alarm time. suggested the whole point
Platform: | Size: 311811 | Author: xiak | Hits:

[assembly languagejh2

Description: 本题目的主要要求是要实现闹钟的功能内容:设计一个能够显示时分秒的数字时钟,时间显示为12小时制,除了显示分时秒外,并能实现上,下午。可以进行手动校时,定时(完成此题目时要有适当的设置,确定灯按钮,单,双灯作为报警显示),同时还应该能够清零。-the subject of the main demands is to achieve the alarm clock function : to design a display of accurate digital clock, the time displayed by the system for 12 hours, showing the time of seconds, and can achieve the afternoon. Can manually school, regular (completion of this topic have appropriate settings, to determine button lights alone, as the police showed two-lamp), but also should be able to reset.
Platform: | Size: 2471 | Author: 杨正朋 | Hits:

[assembly languagejh2

Description: 本题目的主要要求是要实现闹钟的功能内容:设计一个能够显示时分秒的数字时钟,时间显示为12小时制,除了显示分时秒外,并能实现上,下午。可以进行手动校时,定时(完成此题目时要有适当的设置,确定灯按钮,单,双灯作为报警显示),同时还应该能够清零。-the subject of the main demands is to achieve the alarm clock function : to design a display of accurate digital clock, the time displayed by the system for 12 hours, showing the time of seconds, and can achieve the afternoon. Can manually school, regular (completion of this topic have appropriate settings, to determine button lights alone, as the police showed two-lamp), but also should be able to reset.
Platform: | Size: 2048 | Author: 杨正朋 | Hits:

[VHDL-FPGA-VerilogVerilog DHL数字钟

Description: 用Verilog DHL语言编写的一个数字钟程序,除了基本计数,还具有校时,闹钟功能-Verilog language used in the preparation of a digital clock procedures, in addition to the basic count, but also with school, an alarm clock
Platform: | Size: 2048 | Author: 谢树扬 | Hits:

[VHDL-FPGA-Verilogclockv

Description: 使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.-use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions.
Platform: | Size: 5120 | Author: 刘吉 | Hits:

[Otherautoma_start

Description: 日常生活中常常会遇到由于事务繁忙或要处理的事太多,造成健忘,无序的事务管理,对个人或单位造成很大麻烦 。 本闹钟是一款集功能强大、使用便捷、精致小巧、美观大方四为一体的个人用计算机定时自动执行软件。 网络校时功能可连接至十三个互联网原子钟获取标准时间并进行调整。 1、能够方便的在您需要的时候“关闭计算机/重启计算机/注销计算机/待机计算机/打开文件(程序)”。 2、执行操作的时间设置也十分贴心,可以“定时操作/延时操作/等待操作”。 3、具备公历农历查看功能的万年历。 4、网络原子钟校时。 5、使用图形界面,内置面板,钟面窗口形状随图形改变,外形活泼可爱,特色鲜明。 6、可以设定多项闹铃任务,最大的灵活性覆盖一年365天。-daily life will often encounter as busy or to deal with too many things, causing forgetful, disorderly Management, the individual or unit cause great trouble. The alarm clock is set one powerful, easy to use and occupy small, pleasing to the eye as one of four personal computers regularly software automatically. Network school function can be connected to the Internet 13 hours clock access to standards and make the adjustments. 1. to the convenience when you need it, "closed computer/restart the computer/write-off of computer/Standby computer/open text pieces (procedures). " 2, the execution of set-up time is also very intimate, "TIMED/Delay operation/wait for the operation." 3, Lunar calendar with the calendar View function. 4, the network clock school. 5,
Platform: | Size: 827392 | Author: 乐乐 | Hits:

[OtherEWB

Description: EWB做的多功能数字钟 由振荡器输出稳定的高频脉冲信号作为时间基准,经分频器输出标准的秒脉冲,秒计数器满60向分计数器进位,分计数器满60向小时计数器进位,小时计数器按“12翻1”规律计数,计数器经译码器送到显示器;计数出现误差可用校时电路进行校时、校分、校秒, 可发挥部分:使闹钟具有可整点报时与定时闹钟的功能。 -EWB done by the multi-function digital clock oscillator output stable high frequency pulse signal as a time reference. Frequency Divider output by the standards of seconds pulse, aged 60 seconds to counter-counter rounding, Counter-to-60-hour counter rounding, by the Counter-hour "12 over a" law count, Counter by the decoder to display; Counting errors school circuit can be used for schools, school hours, school seconds to play : The alarm clock can be made with whole point regular alarm clock and timer functions.
Platform: | Size: 129024 | Author: zero | Hits:

[assembly languagedigital_clk

Description: 此程序是实现数字钟的,包括校时 闹钟 二十四小时和十二小时的转换-This procedure is to achieve digital clock, including the school alarm clock 24 hours and 12 hours the conversion
Platform: | Size: 576512 | Author: daigunagzhi | Hits:

[DocumentsNice-School-Alarm-System

Description: this the schematic of school bell system-this is the schematic of school bell system
Platform: | Size: 2718720 | Author: kamranmu | Hits:

[Education soft systemautomated_school_bell

Description: This a program for automatic school bells using signals from LTP [printer port]. Advanced windows like graphics Multi exe program Hot keys file database electronic circuit for fire alarm using LDR A bell circuit Parallel port HOW TO GUIDE Keyboard HOTKEY program fire alarm details Electonic circuit control through parallel port [LTP] - This is a program for automatic school bells using signals from LTP [printer port]. Advanced windows like graphics Multi exe program Hot keys file database electronic circuit for fire alarm using LDR A bell circuit Parallel port HOW TO GUIDE Keyboard HOTKEY program fire alarm details Electonic circuit control through parallel port [LTP]
Platform: | Size: 78848 | Author: anatolia | Hits:

[VHDL-FPGA-VerilogProject-Clock-plus-alarm

Description: 实现超多功能数字钟的vhdl硬件实现,可以实现校时校分闹铃,多模切换,多模同时工作-Ultra-versatile digital clock vhdl hardware implementation can be achieved when the school hours the school alarm, multi-mode switching, multi-mode simultaneously
Platform: | Size: 531456 | Author: Ivan Kwan | Hits:

[SCMclock

Description: 用51单片机做的多功能电子钟,有时间、日历、温度显示,4*4键盘校时,闹钟功能-Microcontroller to do with the 51 multi-function digital clock, time, calendar, temperature display, 4* 4 keyboard school, alarm clock function
Platform: | Size: 3177472 | Author: 韩冰 | Hits:

[Embeded-SCM Developc

Description: 基于isd1420语音芯片的温度报警 C语言 外加PROTEUS仿真图,这些是在学校做的,以后会陆续上传全部,与大家分享-Based on isd1420 voice chip temperature alarm PROTEUS simulation Figure C-plus, which is done in the school, will continue to upload all of the future, and share-Based on isd1420 voice chip temperature alarm PROTEUS simulation Figure C-plus, these are done in the school, will continue to upload after all, to share with you
Platform: | Size: 1119232 | Author: madud00079 | Hits:

[Otheralarm-clock-V0.1

Description: 小学期用MFC做的小闹钟,用VC++6.0打开-Small alarm clock, with the primary school period to do with MFC VC++6.0 open
Platform: | Size: 13491200 | Author: Allen | Hits:

[VHDL-FPGA-Verilogshuzizhong

Description: 数字钟verilog程序,实现了校时、闹钟校正、整点报时功能。-Digital clock verilog program, school, alarm clock correction, the whole point timekeeping function.
Platform: | Size: 102400 | Author: veryshi | Hits:

[VHDL-FPGA-Verilogelectronic-clock

Description: verilog电子时钟,可以实现复位、计时、校时、闹钟等多种功能。-verilog electronic clock, you can achieve a variety of functions reset, time, school, alarm clock and so on.
Platform: | Size: 371712 | Author: 未完成 | Hits:
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