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[VHDL-FPGA-Verilogscrambler

Description: 通信系统中的加扰与解扰程序,用verilog语言实现,有波形文件可以直接查看功能-Communication Systems scrambling and descrambling process, with Verilog language, has waveform files can be directly read features
Platform: | Size: 323584 | Author: 桃子 | Hits:

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