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[VHDL-FPGA-VerilogSDHAnalysis

Description: 光纤通信中的SDH数据帧解析及提取的VHDL实现源代码,共包含帧同步、E1及F1码流提取、DCC1码流提取、帧头开销串行输出四个主要模块-SDH fiber-optic communication data frame analysis and retrieval implementation of VHDL source code, include the frame synchronization, E1 and F1 stream extraction, DCC1 stream extraction, header overhead serial output four main modules
Platform: | Size: 31744 | Author: 张晓彬 | Hits:

[Other Embeded programProject_EOW_Tasking_Project_file-C_source_Code-XA

Description: Engineering Order Wire for Fiber Optic Communication system of SDH/SONET Processor: Philips 80xa51 16bit Source Code: C Project: Tasking -Engineering Order Wire for Fiber Optic Communication system of SDH/SONET Processor: Philips 80xa51 16bit Source Code: C Project: Tasking
Platform: | Size: 36864 | Author: vasavya | Hits:

[VHDL-FPGA-VerilogVHDL_SDH

Description: 现代光纤通信SDH的VHDL源码,实现SDH开销的接收处理。-VHDL source code of modern fiber-optic communication SDH the SDH overhead of receiving and processing.
Platform: | Size: 57344 | Author: 张雷 | Hits:

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