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[VHDL-FPGA-VerilogIPcore

Description: 基于EP3C25的Altera SDI IP核的使用-EP3C25 Altera SDI IP
Platform: | Size: 1486848 | Author: wzk | Hits:

[VHDL-FPGA-VerilogDecoderAudio

Description: 本程序为SDI的音视频分离Verilog程序,信号通过分离后,可以分离出视频和音频信号。-This procedure for the separation of SDI audio and video Verilog program, the signal after the separation, can be isolated video and audio signals.
Platform: | Size: 2048 | Author: 邢占鹏 | Hits:

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