Search - sdram sopc

[Embeded-SCM Develop] SDRAM

Description: SDRAM Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 1572577 | Author: 李大同 | Hits:

[Other resource] Sdram_Control_4Port

Description: sopc sdram 硬核的verilog 源码
Platform: | Size: 13288 | Author: wxx | Hits:

[Embeded-SCM Develop] SDRAM

Description: SDRAM Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 1571840 | Author: 李大同 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_SRAM_PIC_DISPLAY

Description: NIOS下，将图片显示到液晶屏上去，基于DE2板子的，全硬件实现，现将图片烧到SDRAM，然后可以直接显示到液晶屏。
Platform: | Size: 1234944 | Author: 刘赛 | Hits:

[Other Embeded program] Sdram_Control_4Port

Description: sopc sdram 硬核的verilog 源码-sopc sdram hard core of the Verilog source code
Platform: | Size: 13312 | Author: wxx | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[VHDL-FPGA-Verilog] my_sram

Description: 在sopc builder 中填加SDRAM(IS61LV25616AL),能够直接被系统识别。-Sopc builder filled in Canada in the SDRAM (IS61LV25616AL), the system can be directly identified.
Platform: | Size: 20480 | Author: desd | Hits:

[Other] sdram

Description: sopc中一个关于sdram的实验，用altera的开发板。-about sdram of sopc
Platform: | Size: 12766208 | Author: 李华 | Hits:

[VHDL-FPGA-Verilog] FLASH_SDRAM

Description: 利用QUARTUS II的SOPC设计的Nios II系统，检测Flash模块和SDRAM模块是否可用。对于设计之前的模块检测有一定参考价值。-Use of QUARTUS II of the Nios II system, SOPC designs, testing Flash module and SDRAM module is available. Prior to testing for the design of the modules have a certain reference value.
Platform: | Size: 12325888 | Author: Sean Zhong | Hits:

[Other] ddr_ddr2_sdram9.0

Description: altera 公司提供的ddr_ddr2_sdram9.0，DDR2 SDRAM 源代码-altera provided ddr_ddr2_sdram9.0, DDR2 SDRAM source code
Platform: | Size: 912384 | Author: tiantian | Hits:

[VHDL-FPGA-Verilog] EP2C8Q208_SDRAM

Description: 一个基于NIOS的SDRAM开发程序，比较有用-NIOS FPGA SOPC SDRAM
Platform: | Size: 2057216 | Author: 尧 | Hits:

[VHDL-FPGA-Verilog] nios_shi

Description: 由nios ii实现的，用cfi flash与SDRAM共同实现的电子数字时钟，基于sopc的嵌入式代码，所用软件都是9.0版本的，包括quartus ii9.0 和nios ii9.0-Achieved by the nios ii, together with the cfi flash with SDRAM to achieve the electronic digital clock, based on sopc embedded code, the software is version 9.0, including quartus ii9.0, and nios ii9.0
Platform: | Size: 8524800 | Author: liyu | Hits:

[VHDL-FPGA-Verilog] EP2C8_SDRAM_FLASH

Description: NIOSII FLASH设置程序范例，sopc应用-NIOSII FLASH setup example, sopc application
Platform: | Size: 6361088 | Author: liming | Hits:

[VHDL-FPGA-Verilog] SDRAM-control-SOPC

Description: sdram 控制器的sopc搭建 sdram 控制器的sopc搭建 -sdram controller the sopc build sdram controller sopc structures the
Platform: | Size: 3128320 | Author: lan yu | Hits:

[VHDL-FPGA-Verilog] sdram_test

Description: 自己实现的一个基于SOPC架构的SDRAM模块-Own implementation of an architecture based on SOPC SDRAM module
Platform: | Size: 8327168 | Author: 才新和 | Hits:

[VHDL-FPGA-Verilog] sdram1

Description: 定制sopc系统。使用sdram控制器。在nios ide上执行存储器的读写操作。-To customize sopc system. Use sdram controller. In the the nios ide perform memory read and write operations.
Platform: | Size: 11252736 | Author: zzh | Hits:

[VHDL-FPGA-Verilog] LCDandSDRAM-test

Description: 一个SOPC实验，关于LCD的控制和SDRAM的使用方法-A SOPC experiment on LCD of control and the use of SDRAM
Platform: | Size: 779264 | Author: 狗狗 | Hits:

[VHDL-FPGA-Verilog] 12_sdram

Description: 编写的sdram 应用 altera sopc
Platform: | Size: 1024 | Author: rkl110 | Hits:

[SCM] LCD

Description: 本实验通过使用 SOPC Builder 搭建一个包含cpu、ram、sdram、pio、lcd定制ip核、jtag _uart”的SOPC系统。 1.通过该系统实现在eclipse的调试串口上显示字符的功能。 2.通过该nios处理器的pio实现流水灯的效果。 3.通过该系统实现在1602液晶上的字符显示。
Platform: | Size: 12288 | Author: 张丽丽 | Hits:

[VHDL-FPGA-Verilog] NIOS interface with SD card SPI

Description: So, the project is attached. Implemented NIOS2 processor on SOPC Quartus 11.1, uses SDRAM (on chip project in this version does not fit) SPI interface is used for communication between Nios and SD card (3 fpga outputs, one fpga input) Accordingly, it opens the message.txt file on the SD card and outputs its contents to the console, creates a file, fills it in, gives a list of files in the root.
Platform: | Size: 157645 | Author: hemamont@mail.ru | Hits:

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[Embeded-SCM Develop] SDRAM

[Other resource] Sdram_Control_4Port

[Embeded-SCM Develop] SDRAM

[VHDL-FPGA-Verilog] DE2_LCM_SRAM_PIC_DISPLAY

[Other Embeded program] Sdram_Control_4Port

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

[VHDL-FPGA-Verilog] my_sram

[Other] sdram

[VHDL-FPGA-Verilog] FLASH_SDRAM

[Other] ddr_ddr2_sdram9.0

[VHDL-FPGA-Verilog] EP2C8Q208_SDRAM

[VHDL-FPGA-Verilog] nios_shi

[VHDL-FPGA-Verilog] EP2C8_SDRAM_FLASH

[VHDL-FPGA-Verilog] SDRAM-control-SOPC

[VHDL-FPGA-Verilog] sdram_test

[VHDL-FPGA-Verilog] sdram1

[VHDL-FPGA-Verilog] LCDandSDRAM-test

[VHDL-FPGA-Verilog] 12_sdram

[SCM] LCD

[VHDL-FPGA-Verilog] NIOS interface with SD card SPI

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