Description: 基于Altera公司NiosII嵌入式处理器开发的一个控制系统模型,用QuartusII和VB完成,利用串口实现了PC与Altera_DE2开发板之间通信,DE2反馈信息,PC进行控制操作。本设计获陕西省06年大学生电子设计大赛二等奖。-based Altera Corporation NiosII embedded processor development of a control system model, QuartusII and use VB completed, Use Serial Port Altera_DE2 the PC and communication between the development board, DE2 feedback information, PC control operation. The design of Shaanxi Province in 06 Undergraduate Electronic Design Contest second prize. Platform: |
Size: 312316 |
Author:尚方喆 |
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Description: 一个VC++编写的串口通信程序,可以通过串口发送和接收数据,并输出日志,也包含串口通讯中参数的设置-a VC prepared by the serial communication program, through the serial port to send and receive data and log exports, also includes serial communication parameters set Platform: |
Size: 169984 |
Author:fwy |
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Description: 开源的串口通信程序,用vhdl 编写的,已通过测试,在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run. Platform: |
Size: 2048 |
Author:caijl88 |
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Description: 基于VHDL的串行同步通信SPI设计
本设计是用Quartus作为开发环境,以DE2板为硬件平台实现的SPI同步串行通讯。设计过程方便。根据接收和发送两个主要部分实现了SPI的基本功能。此外,该设计还实现了波特率发生器,数码管显示的功能。用DE2板实现具有电路简洁,开发周期短的优点。充分利用了EDA设计的优点。开发过程用了VHDL硬件描述语言进行描述,从底层设计,分模块进行,充分提高了设计者的数字逻辑设计的概念。-VHDL-based SPI serial synchronous communication design as the design is the use of Quartus development environment to DE2 board as the hardware platform of the SPI synchronous serial communication. Facilitate the design process. According to both send and receive SPI implements the main part of the basic functions. In addition, the design also implements the baud rate generator, digital display features. DE2 board to achieve a circuit with a simple, short development cycle advantages. Full use of the EDA design advantages. Development Process VHDL hardware description language used to describe the design from the ground, sub-module, to fully enhance the designer' s concept of digital logic design. Platform: |
Size: 51200 |
Author:陈添 |
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Description: 基于DE2开发板的串口通信程序,使用Verilog HDL语言,-Serial communication program based on the DE2 board, using the Verilog HDL language Platform: |
Size: 15029248 |
Author:cuit2009 |
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Description: 基于SOPC的串口通讯实验,在DE2开发板上运行通过。芯片为EP2C35F672C6-SOPC-based serial communication experiment, run by the DE2 board. Chip for EP2C35F672C6 Platform: |
Size: 3072 |
Author:吴丹 |
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Description: Verilog在DE2实现串口通信,通过上位机给DE2发送数据,并反馈给上位机-Verilog serial communication in the DE2 DE2 send data through the host computer, and feedback to the host computer Platform: |
Size: 34816 |
Author:Mr.wang |
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