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[VHDL-FPGA-Verilog] vcpwmcpldcar

Description: vc++与vhdl代码,cpld接受pc串口指令,输出pwm信号控制伺服电机.双通道,各128级.使用了扩展ascii码-vc++ with VHDL code, cpld accept pc serial commands, the output pwm signal to control servo motor. dual-channel, the 128. the use of extended ascii code
Platform: | Size: 959488 | Author: hxf | Hits:

[VHDL-FPGA-Verilog] Thecontrolofsteppermotorandservomotorbasedonvhdl.r

Description: 本程序采用vhdl语言对步进电机及伺服电机进行控制，控制方式灵活，有变速，正反转，显示等多个模块-This procedure using VHDL language of stepper motor and servo motor control, control flexibility, have variable speed, positive, showing a number of modules, etc.
Platform: | Size: 4096 | Author: 阿汤 | Hits:

[VHDL-FPGA-Verilog] servo_module_worked

Description: verilog pwm to control servo motor on quartus
Platform: | Size: 21504 | Author: frankie | Hits:

[VHDL-FPGA-Verilog] zldj

Description: 一种直流电机伺服系统的设计，其中包括了各种控制模块的VHDL语言-A kind of DC motor servo system design, including the various control modules of VHDL language
Platform: | Size: 2002944 | Author: 刘建平 | Hits:

[Software Engineering] Radar-on-FPGA

Description: 主要论述了基于FPGA的末制导雷达伺服系统设计。结合末制导雷达讨论其电机控制、二阶伺服系统性能和PID校正算法,利用VHDL语言设计,实现基于FPGA的方位步进电机开环定位控制和俯仰直流电机闭环速度控制的伺服系统。结合实际应用中遇到的问题,提出了基于"反馈控制"理论的有效的补偿算法,该算法提高了伺服系统的稳定性、快速性和精度。-Mainly discusses the design of terminal guidance radar servo system based on Field Programmable Gates Array(FPGA).It includes the system’s electric machine control,second-order servo system performance and PID correction algorithm based on Virtual Hardware Description Language(VHDL) on azimuth stepping motor open loop positioning control and pitch direct current electric machine closed loop speed control of the FPGA servo system.In allusion to some factual problems during its application,presents corresponding effective solutions based on traditional control theory "Feedback Control".The fact proves that these methods can greatly improve the stability,speediness and precision of the original servo system.Additionally,a basic algorithm which can be realized in a terminal guidance radar servo system is given
Platform: | Size: 1137664 | Author: mabeibei | Hits:

[VHDL-FPGA-Verilog] VHDL-book3

Description: D_flipflop：1位D触发器的设计 D_fllipflop_behav：4位D触发器的设计 reg1bit：1位寄存器设计 reg4bit：4位寄存器设计 shiftreg4：一般移位寄存器的设计 ring_shiftreg4：环型移位寄存器的设计 debounce4：消抖电路的设计 clock_pulse：时钟脉冲电路的设计 count3bit_gate：3位计数器的设计 count3bit_behav：3位计数器的设计 mod5cnt：模5计数器的设计 mod10Kcnt：时钟分频器的设计 morsea：任意波生成器的设计 sw2reg：加载开关量到寄存器的设计 shift_reg8：移位数据到移位寄存器的设计 scroll：滚动7段数码显示设计 fib：Fibonacci序列设计 pwm4：PWM控制直流电机设计 pwmg：PWM控制伺服电机位置设计-D_flipflop: 1-bit D flip-flop design D_fllipflop_behav: 4-bit D flip-flop design reg1bit: 1-bit register design reg4bit: 4-bit register design shiftreg4: general shift register design ring_shiftreg4: ring shift register design debounce4: elimination shake circuit design clock_pulse: clock pulse circuit design count3bit_gate: 3-bit counter design count3bit_behav: 3-bit counter design mod5cnt: Mode 5 counter design mod10Kcnt: clock divider design morsea: arbitrary waveform generator design sw2reg: Load switch to register the design shift_reg8: shift data into the shift register design scroll: Scroll 7-segment digital display design fib: Fibonacci Sequence Design pwm4: PWM controlled DC motor design pwmg: PWM servo motor position control design
Platform: | Size: 9017344 | Author: 贾诩 | Hits:

[Other] arm_FPGA

Description: 步进电机、直流电机PWM控制、伺服电机编码器解码vhdl程序-Stepper motor, PWM DC motor control, servo motor encoder decoder VHDL program
Platform: | Size: 25600 | Author: 刘文 | Hits:

[Embeded-SCM Develop] js_fpga

Description: 使用altera的FPGA构建的sopc系统，进行嵌入式C编程，实现了伺服电机的控制。(The SOPC system is built with Altera FPGA, and embedded C programming is used to realize the servo motor control.)
Platform: | Size: 31439872 | Author: Archerlich | Hits:

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